18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Samsung SoC I2S controller
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Krzysztof Kozlowski <krzk@kernel.org>
118c2ecf20Sopenharmony_ci  - Sylwester Nawrocki <s.nawrocki@samsung.com>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciproperties:
148c2ecf20Sopenharmony_ci  compatible:
158c2ecf20Sopenharmony_ci    description: |
168c2ecf20Sopenharmony_ci      samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci      samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
198c2ecf20Sopenharmony_ci      secondary FIFO, s/w reset control and internal mux for root clock
208c2ecf20Sopenharmony_ci      source.
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci      samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
238c2ecf20Sopenharmony_ci      playback, stereo channel capture, secondary FIFO using internal
248c2ecf20Sopenharmony_ci      or external DMA, s/w reset control, internal mux for root clock
258c2ecf20Sopenharmony_ci      source and 7.1 channel TDM support for playback; TDM (Time division
268c2ecf20Sopenharmony_ci      multiplexing) is to allow transfer of multiple channel audio data on
278c2ecf20Sopenharmony_ci      single data line.
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci      samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
308c2ecf20Sopenharmony_ci      Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
318c2ecf20Sopenharmony_ci      with only external DMA and more number of root clock sampling
328c2ecf20Sopenharmony_ci      frequencies.
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci      samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
358c2ecf20Sopenharmony_ci      stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with
368c2ecf20Sopenharmony_ci      slightly modified bit offsets.
378c2ecf20Sopenharmony_ci    enum:
388c2ecf20Sopenharmony_ci      - samsung,s3c6410-i2s
398c2ecf20Sopenharmony_ci      - samsung,s5pv210-i2s
408c2ecf20Sopenharmony_ci      - samsung,exynos5420-i2s
418c2ecf20Sopenharmony_ci      - samsung,exynos7-i2s
428c2ecf20Sopenharmony_ci      - samsung,exynos7-i2s1
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci  '#address-cells':
458c2ecf20Sopenharmony_ci    const: 1
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci  '#size-cells':
488c2ecf20Sopenharmony_ci    const: 0
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci  reg:
518c2ecf20Sopenharmony_ci    maxItems: 1
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci  dmas:
548c2ecf20Sopenharmony_ci    minItems: 2
558c2ecf20Sopenharmony_ci    maxItems: 3
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci  dma-names:
588c2ecf20Sopenharmony_ci    oneOf:
598c2ecf20Sopenharmony_ci      - items:
608c2ecf20Sopenharmony_ci          - const: tx
618c2ecf20Sopenharmony_ci          - const: rx
628c2ecf20Sopenharmony_ci      - items:
638c2ecf20Sopenharmony_ci          - const: tx
648c2ecf20Sopenharmony_ci          - const: rx
658c2ecf20Sopenharmony_ci          - const: tx-sec
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci  assigned-clock-parents: true
688c2ecf20Sopenharmony_ci  assigned-clocks: true
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci  clocks:
718c2ecf20Sopenharmony_ci    minItems: 1
728c2ecf20Sopenharmony_ci    maxItems: 3
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci  clock-names:
758c2ecf20Sopenharmony_ci    oneOf:
768c2ecf20Sopenharmony_ci      - items:
778c2ecf20Sopenharmony_ci          - const: iis
788c2ecf20Sopenharmony_ci      - items: # for I2S0
798c2ecf20Sopenharmony_ci          - const: iis
808c2ecf20Sopenharmony_ci          - const: i2s_opclk0
818c2ecf20Sopenharmony_ci          - const: i2s_opclk1
828c2ecf20Sopenharmony_ci      - items: # for I2S1 and I2S2
838c2ecf20Sopenharmony_ci          - const: iis
848c2ecf20Sopenharmony_ci          - const: i2s_opclk0
858c2ecf20Sopenharmony_ci    description: |
868c2ecf20Sopenharmony_ci      "iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources
878c2ecf20Sopenharmony_ci      of the root clock. I2S0 has internal mux to select the source
888c2ecf20Sopenharmony_ci      of root clock and I2S1 and I2S2 doesn't have any such mux.
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci  "#clock-cells":
918c2ecf20Sopenharmony_ci    const: 1
928c2ecf20Sopenharmony_ci
938c2ecf20Sopenharmony_ci  clock-output-names:
948c2ecf20Sopenharmony_ci    deprecated: true
958c2ecf20Sopenharmony_ci    oneOf:
968c2ecf20Sopenharmony_ci      - items: # for I2S0
978c2ecf20Sopenharmony_ci          - const: i2s_cdclk0
988c2ecf20Sopenharmony_ci      - items: # for I2S1
998c2ecf20Sopenharmony_ci          - const: i2s_cdclk1
1008c2ecf20Sopenharmony_ci      - items: # for I2S2
1018c2ecf20Sopenharmony_ci          - const: i2s_cdclk2
1028c2ecf20Sopenharmony_ci    description: Names of the CDCLK I2S output clocks.
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci  interrupts:
1058c2ecf20Sopenharmony_ci    maxItems: 1
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_ci  samsung,idma-addr:
1088c2ecf20Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
1098c2ecf20Sopenharmony_ci    description: |
1108c2ecf20Sopenharmony_ci      Internal DMA register base address of the audio
1118c2ecf20Sopenharmony_ci      subsystem (used in secondary sound source).
1128c2ecf20Sopenharmony_ci
1138c2ecf20Sopenharmony_ci  pinctrl-0:
1148c2ecf20Sopenharmony_ci    description: Should specify pin control groups used for this controller.
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ci  pinctrl-names:
1178c2ecf20Sopenharmony_ci    const: default
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci  power-domains:
1208c2ecf20Sopenharmony_ci    maxItems: 1
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci  "#sound-dai-cells":
1238c2ecf20Sopenharmony_ci    const: 1
1248c2ecf20Sopenharmony_ci
1258c2ecf20Sopenharmony_cirequired:
1268c2ecf20Sopenharmony_ci  - compatible
1278c2ecf20Sopenharmony_ci  - reg
1288c2ecf20Sopenharmony_ci  - dmas
1298c2ecf20Sopenharmony_ci  - dma-names
1308c2ecf20Sopenharmony_ci  - clocks
1318c2ecf20Sopenharmony_ci  - clock-names
1328c2ecf20Sopenharmony_ci
1338c2ecf20Sopenharmony_ciadditionalProperties: false
1348c2ecf20Sopenharmony_ci
1358c2ecf20Sopenharmony_ciexamples:
1368c2ecf20Sopenharmony_ci  - |
1378c2ecf20Sopenharmony_ci    #include <dt-bindings/clock/exynos-audss-clk.h>
1388c2ecf20Sopenharmony_ci
1398c2ecf20Sopenharmony_ci    i2s0: i2s@3830000 {
1408c2ecf20Sopenharmony_ci        compatible = "samsung,s5pv210-i2s";
1418c2ecf20Sopenharmony_ci        reg = <0x03830000 0x100>;
1428c2ecf20Sopenharmony_ci        dmas = <&pdma0 10>,
1438c2ecf20Sopenharmony_ci                <&pdma0 9>,
1448c2ecf20Sopenharmony_ci                <&pdma0 8>;
1458c2ecf20Sopenharmony_ci        dma-names = "tx", "rx", "tx-sec";
1468c2ecf20Sopenharmony_ci        clocks = <&clock_audss EXYNOS_I2S_BUS>,
1478c2ecf20Sopenharmony_ci                <&clock_audss EXYNOS_I2S_BUS>,
1488c2ecf20Sopenharmony_ci                <&clock_audss EXYNOS_SCLK_I2S>;
1498c2ecf20Sopenharmony_ci        clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
1508c2ecf20Sopenharmony_ci        #clock-cells = <1>;
1518c2ecf20Sopenharmony_ci        samsung,idma-addr = <0x03000000>;
1528c2ecf20Sopenharmony_ci        pinctrl-names = "default";
1538c2ecf20Sopenharmony_ci        pinctrl-0 = <&i2s0_bus>;
1548c2ecf20Sopenharmony_ci        #sound-dai-cells = <1>;
1558c2ecf20Sopenharmony_ci    };
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