18c2ecf20Sopenharmony_ciRT5659/RT5658 audio CODEC 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThis device supports I2C only. 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciRequired properties: 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci- compatible : One of "realtek,rt5659" or "realtek,rt5658". 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci- reg : The I2C address of the device. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci- interrupts : The CODEC's interrupt output. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciOptional properties: 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci- clocks: The phandle of the master clock to the CODEC 168c2ecf20Sopenharmony_ci- clock-names: Should be "mclk" 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci- realtek,in1-differential 198c2ecf20Sopenharmony_ci- realtek,in3-differential 208c2ecf20Sopenharmony_ci- realtek,in4-differential 218c2ecf20Sopenharmony_ci Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended. 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci- realtek,dmic1-data-pin 248c2ecf20Sopenharmony_ci 0: dmic1 is not used 258c2ecf20Sopenharmony_ci 1: using IN2N pin as dmic1 data pin 268c2ecf20Sopenharmony_ci 2: using GPIO5 pin as dmic1 data pin 278c2ecf20Sopenharmony_ci 3: using GPIO9 pin as dmic1 data pin 288c2ecf20Sopenharmony_ci 4: using GPIO11 pin as dmic1 data pin 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci- realtek,dmic2-data-pin 318c2ecf20Sopenharmony_ci 0: dmic2 is not used 328c2ecf20Sopenharmony_ci 1: using IN2P pin as dmic2 data pin 338c2ecf20Sopenharmony_ci 2: using GPIO6 pin as dmic2 data pin 348c2ecf20Sopenharmony_ci 3: using GPIO10 pin as dmic2 data pin 358c2ecf20Sopenharmony_ci 4: using GPIO12 pin as dmic2 data pin 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci- realtek,jd-src 388c2ecf20Sopenharmony_ci 0: No JD is used 398c2ecf20Sopenharmony_ci 1: using JD3 as JD source 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. 428c2ecf20Sopenharmony_ci- realtek,reset-gpios : The GPIO that controls the CODEC's RESET pin. 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ciPins on the device (for linking into audio routes) for RT5659/RT5658: 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci * DMIC L1 478c2ecf20Sopenharmony_ci * DMIC R1 488c2ecf20Sopenharmony_ci * DMIC L2 498c2ecf20Sopenharmony_ci * DMIC R2 508c2ecf20Sopenharmony_ci * IN1P 518c2ecf20Sopenharmony_ci * IN1N 528c2ecf20Sopenharmony_ci * IN2P 538c2ecf20Sopenharmony_ci * IN2N 548c2ecf20Sopenharmony_ci * IN3P 558c2ecf20Sopenharmony_ci * IN3N 568c2ecf20Sopenharmony_ci * IN4P 578c2ecf20Sopenharmony_ci * IN4N 588c2ecf20Sopenharmony_ci * HPOL 598c2ecf20Sopenharmony_ci * HPOR 608c2ecf20Sopenharmony_ci * SPOL 618c2ecf20Sopenharmony_ci * SPOR 628c2ecf20Sopenharmony_ci * LOUTL 638c2ecf20Sopenharmony_ci * LOUTR 648c2ecf20Sopenharmony_ci * MONOOUT 658c2ecf20Sopenharmony_ci * PDML 668c2ecf20Sopenharmony_ci * PDMR 678c2ecf20Sopenharmony_ci * SPDIF 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ciExample: 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_cirt5659 { 728c2ecf20Sopenharmony_ci compatible = "realtek,rt5659"; 738c2ecf20Sopenharmony_ci reg = <0x1b>; 748c2ecf20Sopenharmony_ci interrupt-parent = <&gpio>; 758c2ecf20Sopenharmony_ci interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>; 768c2ecf20Sopenharmony_ci realtek,ldo1-en-gpios = 778c2ecf20Sopenharmony_ci <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 788c2ecf20Sopenharmony_ci}; 79