18c2ecf20Sopenharmony_ciNVIDIA Tegra 20 I2S controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible : "nvidia,tegra20-i2s" 58c2ecf20Sopenharmony_ci- reg : Should contain I2S registers location and length 68c2ecf20Sopenharmony_ci- interrupts : Should contain I2S interrupt 78c2ecf20Sopenharmony_ci- resets : Must contain an entry for each entry in reset-names. 88c2ecf20Sopenharmony_ci See ../reset/reset.txt for details. 98c2ecf20Sopenharmony_ci- reset-names : Must include the following entries: 108c2ecf20Sopenharmony_ci - i2s 118c2ecf20Sopenharmony_ci- dmas : Must contain an entry for each entry in clock-names. 128c2ecf20Sopenharmony_ci See ../dma/dma.txt for details. 138c2ecf20Sopenharmony_ci- dma-names : Must include the following entries: 148c2ecf20Sopenharmony_ci - rx 158c2ecf20Sopenharmony_ci - tx 168c2ecf20Sopenharmony_ci- clocks : Must contain one entry, for the module clock. 178c2ecf20Sopenharmony_ci See ../clocks/clock-bindings.txt for details. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciExample: 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_cii2s@70002800 { 228c2ecf20Sopenharmony_ci compatible = "nvidia,tegra20-i2s"; 238c2ecf20Sopenharmony_ci reg = <0x70002800 0x200>; 248c2ecf20Sopenharmony_ci interrupts = < 45 >; 258c2ecf20Sopenharmony_ci clocks = <&tegra_car 11>; 268c2ecf20Sopenharmony_ci resets = <&tegra_car 11>; 278c2ecf20Sopenharmony_ci reset-names = "i2s"; 288c2ecf20Sopenharmony_ci dmas = <&apbdma 21>, <&apbdma 21>; 298c2ecf20Sopenharmony_ci dma-names = "rx", "tx"; 308c2ecf20Sopenharmony_ci}; 31