18c2ecf20Sopenharmony_ciMarvell PXA SSP CPU DAI bindings 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci compatible Must be "mrvl,pxa-ssp-dai" 68c2ecf20Sopenharmony_ci port A phandle reference to a PXA ssp upstream device 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciOptional properties: 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci clock-names 118c2ecf20Sopenharmony_ci clocks Through "clock-names" and "clocks", external clocks 128c2ecf20Sopenharmony_ci can be configured. If a clock names "extclk" exists, 138c2ecf20Sopenharmony_ci it will be set to the mclk rate of the audio stream 148c2ecf20Sopenharmony_ci and be used as clock provider of the DAI. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciExample: 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci /* upstream device */ 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci ssp1: ssp@41000000 { 218c2ecf20Sopenharmony_ci compatible = "mrvl,pxa3xx-ssp"; 228c2ecf20Sopenharmony_ci reg = <0x41000000 0x40>; 238c2ecf20Sopenharmony_ci interrupts = <24>; 248c2ecf20Sopenharmony_ci clock-names = "pxa27x-ssp.0"; 258c2ecf20Sopenharmony_ci }; 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci /* DAI as user */ 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci ssp_dai0: ssp_dai@0 { 308c2ecf20Sopenharmony_ci compatible = "mrvl,pxa-ssp-dai"; 318c2ecf20Sopenharmony_ci port = <&ssp1>; 328c2ecf20Sopenharmony_ci #sound-dai-cells = <0>; 338c2ecf20Sopenharmony_ci }; 348c2ecf20Sopenharmony_ci 35