18c2ecf20Sopenharmony_ci* Microchip I2S Multi-Channel Controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci- compatible:     Should be "microchip,sam9x60-i2smcc".
58c2ecf20Sopenharmony_ci- reg:            Should be the physical base address of the controller and the
68c2ecf20Sopenharmony_ci                  length of memory mapped region.
78c2ecf20Sopenharmony_ci- interrupts:     Should contain the interrupt for the controller.
88c2ecf20Sopenharmony_ci- dmas:           Should be one per channel name listed in the dma-names property,
98c2ecf20Sopenharmony_ci                  as described in atmel-dma.txt and dma.txt files.
108c2ecf20Sopenharmony_ci- dma-names:      Identifier string for each DMA request line in the dmas property.
118c2ecf20Sopenharmony_ci		  Two dmas have to be defined, "tx" and "rx".
128c2ecf20Sopenharmony_ci- clocks:         Must contain an entry for each entry in clock-names.
138c2ecf20Sopenharmony_ci                  Please refer to clock-bindings.txt.
148c2ecf20Sopenharmony_ci- clock-names:    Should be one of each entry matching the clocks phandles list:
158c2ecf20Sopenharmony_ci                  - "pclk" (peripheral clock) Required.
168c2ecf20Sopenharmony_ci                  - "gclk" (generated clock) Optional (1).
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ciOptional properties:
198c2ecf20Sopenharmony_ci- pinctrl-0:      Should specify pin control groups used for this controller.
208c2ecf20Sopenharmony_ci- princtrl-names: Should contain only one value - "default".
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci(1) : Only the peripheral clock is required. The generated clock is optional
248c2ecf20Sopenharmony_ci      and should be set mostly when Master Mode is required.
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ciExample:
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci	i2s@f001c000 {
298c2ecf20Sopenharmony_ci		compatible = "microchip,sam9x60-i2smcc";
308c2ecf20Sopenharmony_ci		reg = <0xf001c000 0x100>;
318c2ecf20Sopenharmony_ci		interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
328c2ecf20Sopenharmony_ci		dmas = <&dma0
338c2ecf20Sopenharmony_ci			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
348c2ecf20Sopenharmony_ci			 AT91_XDMAC_DT_PERID(36))>,
358c2ecf20Sopenharmony_ci		       <&dma0
368c2ecf20Sopenharmony_ci			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
378c2ecf20Sopenharmony_ci			 AT91_XDMAC_DT_PERID(37))>;
388c2ecf20Sopenharmony_ci		dma-names = "tx", "rx";
398c2ecf20Sopenharmony_ci		clocks = <&i2s_clk>, <&i2s_gclk>;
408c2ecf20Sopenharmony_ci		clock-names = "pclk", "gclk";
418c2ecf20Sopenharmony_ci		pinctrl-names = "default";
428c2ecf20Sopenharmony_ci		pinctrl-0 = <&pinctrl_i2s_default>;
438c2ecf20Sopenharmony_ci	};
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