18c2ecf20Sopenharmony_ciImagination Technologies SPDIF Input Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired Properties: 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci - compatible : Compatible list, must contain "img,spdif-in" 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci - #sound-dai-cells : Must be equal to 0 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci - reg : Offset and length of the register set for the device 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci - dmas: Contains an entry for each entry in dma-names. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci - dma-names: Must include the following entry: 148c2ecf20Sopenharmony_ci "rx" 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci - clocks : Contains an entry for each entry in clock-names 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci - clock-names : Includes the following entries: 198c2ecf20Sopenharmony_ci "sys" The system clock 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciOptional Properties: 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci - resets: Should contain a phandle to the spdif in reset signal, if any 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci - reset-names: Should contain the reset signal name "rst", if a 268c2ecf20Sopenharmony_ci reset phandle is given 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci - interrupts : Contains the spdif in interrupt, if present 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ciExample: 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_cispdif_in: spdif-in@18100e00 { 338c2ecf20Sopenharmony_ci compatible = "img,spdif-in"; 348c2ecf20Sopenharmony_ci reg = <0x18100E00 0x100>; 358c2ecf20Sopenharmony_ci interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>; 368c2ecf20Sopenharmony_ci dmas = <&mdc 15 0xffffffff 0>; 378c2ecf20Sopenharmony_ci dma-names = "rx"; 388c2ecf20Sopenharmony_ci clocks = <&cr_periph SYS_CLK_SPDIF_IN>; 398c2ecf20Sopenharmony_ci clock-names = "sys"; 408c2ecf20Sopenharmony_ci #sound-dai-cells = <0>; 418c2ecf20Sopenharmony_ci}; 42