18c2ecf20Sopenharmony_ciImagination Technologies Parallel Output Controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired Properties:
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58c2ecf20Sopenharmony_ci  - compatible : Compatible list, must contain "img,parallel-out".
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78c2ecf20Sopenharmony_ci  - #sound-dai-cells : Must be equal to 0
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98c2ecf20Sopenharmony_ci  - reg : Offset and length of the register set for the device.
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118c2ecf20Sopenharmony_ci  - dmas: Contains an entry for each entry in dma-names.
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138c2ecf20Sopenharmony_ci  - dma-names: Must include the following entry:
148c2ecf20Sopenharmony_ci	"tx"
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci  - clocks : Contains an entry for each entry in clock-names.
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188c2ecf20Sopenharmony_ci  - clock-names : Includes the following entries:
198c2ecf20Sopenharmony_ci	"sys"	The system clock
208c2ecf20Sopenharmony_ci	"ref"	The reference clock
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci  - resets: Contains a phandle to the parallel out reset signal
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248c2ecf20Sopenharmony_ci  - reset-names: Contains the reset signal name "rst"
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268c2ecf20Sopenharmony_ciOptional Properties:
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288c2ecf20Sopenharmony_ci  - interrupts : Contains the parallel out interrupt, if present
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308c2ecf20Sopenharmony_ciExample:
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328c2ecf20Sopenharmony_ciparallel_out: parallel-out@18100c00 {
338c2ecf20Sopenharmony_ci	compatible = "img,parallel-out";
348c2ecf20Sopenharmony_ci	reg = <0x18100C00 0x100>;
358c2ecf20Sopenharmony_ci	interrupts = <GIC_SHARED 19 IRQ_TYPE_LEVEL_HIGH>;
368c2ecf20Sopenharmony_ci	dmas = <&mdc 16 0xffffffff 0>;
378c2ecf20Sopenharmony_ci	dma-names = "tx";
388c2ecf20Sopenharmony_ci	clocks = <&cr_periph SYS_CLK_PAUD_OUT>,
398c2ecf20Sopenharmony_ci		 <&clk_core CLK_AUDIO_DAC>;
408c2ecf20Sopenharmony_ci	clock-names = "sys", "ref";
418c2ecf20Sopenharmony_ci	resets = <&pistachio_reset PISTACHIO_RESET_PRL_OUT>;
428c2ecf20Sopenharmony_ci	reset-names = "rst";
438c2ecf20Sopenharmony_ci	#sound-dai-cells = <0>;
448c2ecf20Sopenharmony_ci};
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