18c2ecf20Sopenharmony_cifsl,mqs audio CODEC
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci  - compatible : Must contain one of "fsl,imx6sx-mqs", "fsl,codec-mqs"
58c2ecf20Sopenharmony_ci		"fsl,imx8qm-mqs", "fsl,imx8qxp-mqs".
68c2ecf20Sopenharmony_ci  - clocks : A list of phandles + clock-specifiers, one for each entry in
78c2ecf20Sopenharmony_ci	     clock-names
88c2ecf20Sopenharmony_ci  - clock-names : "mclk" - must required.
98c2ecf20Sopenharmony_ci		  "core" - required if compatible is "fsl,imx8qm-mqs", it
108c2ecf20Sopenharmony_ci		           is for register access.
118c2ecf20Sopenharmony_ci  - gpr : A phandle of General Purpose Registers in IOMUX Controller.
128c2ecf20Sopenharmony_ci	  Required if compatible is "fsl,imx6sx-mqs".
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ciRequired if compatible is "fsl,imx8qm-mqs":
158c2ecf20Sopenharmony_ci  - power-domains: A phandle of PM domain provider node.
168c2ecf20Sopenharmony_ci  - reg: Offset and length of the register set for the device.
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ciExample:
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_cimqs: mqs {
218c2ecf20Sopenharmony_ci	compatible = "fsl,imx6sx-mqs";
228c2ecf20Sopenharmony_ci	gpr = <&gpr>;
238c2ecf20Sopenharmony_ci	clocks = <&clks IMX6SX_CLK_SAI1>;
248c2ecf20Sopenharmony_ci	clock-names = "mclk";
258c2ecf20Sopenharmony_ci	status = "disabled";
268c2ecf20Sopenharmony_ci};
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_cimqs: mqs@59850000 {
298c2ecf20Sopenharmony_ci	compatible = "fsl,imx8qm-mqs";
308c2ecf20Sopenharmony_ci	reg = <0x59850000 0x10000>;
318c2ecf20Sopenharmony_ci	clocks = <&clk IMX8QM_AUD_MQS_IPG>,
328c2ecf20Sopenharmony_ci		 <&clk IMX8QM_AUD_MQS_HMCLK>;
338c2ecf20Sopenharmony_ci	clock-names = "core", "mclk";
348c2ecf20Sopenharmony_ci	power-domains = <&pd_mqs0>;
358c2ecf20Sopenharmony_ci	status = "disabled";
368c2ecf20Sopenharmony_ci};
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