18c2ecf20Sopenharmony_ciCS42L42 audio CODEC
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci  - compatible : "cirrus,cs42l42"
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci  - reg : the I2C address of the device for I2C.
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ci  - VP-supply, VCP-supply, VD_FILT-supply, VL-supply, VA-supply :
108c2ecf20Sopenharmony_ci  power supplies for the device, as covered in
118c2ecf20Sopenharmony_ci  Documentation/devicetree/bindings/regulator/regulator.txt.
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciOptional properties:
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci  - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
168c2ecf20Sopenharmony_ci  deasserted before communication to the codec starts.
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci  - interrupts : IRQ line info CS42L42.
198c2ecf20Sopenharmony_ci  (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
208c2ecf20Sopenharmony_ci  for further information relating to interrupt properties)
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci  - cirrus,ts-inv : Boolean property. For jacks that invert the tip sense
238c2ecf20Sopenharmony_ci  polarity. Normal jacks will short tip sense pin to HS1 when headphones are
248c2ecf20Sopenharmony_ci  plugged in and leave tip sense floating when not plugged in. Inverting jacks
258c2ecf20Sopenharmony_ci  short tip sense when unplugged and float when plugged in.
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci  0 = (Default) Non-inverted
288c2ecf20Sopenharmony_ci  1 = Inverted
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci  - cirrus,ts-dbnc-rise : Debounce the rising edge of TIP_SENSE_PLUG. With no
318c2ecf20Sopenharmony_ci  debounce, the tip sense pin might be noisy on a plug event.
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci  0 - 0ms,
348c2ecf20Sopenharmony_ci  1 - 125ms,
358c2ecf20Sopenharmony_ci  2 - 250ms,
368c2ecf20Sopenharmony_ci  3 - 500ms,
378c2ecf20Sopenharmony_ci  4 - 750ms,
388c2ecf20Sopenharmony_ci  5 - (Default) 1s,
398c2ecf20Sopenharmony_ci  6 - 1.25s,
408c2ecf20Sopenharmony_ci  7 - 1.5s,
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci  - cirrus,ts-dbnc-fall : Debounce the falling edge of TIP_SENSE_UNPLUG.
438c2ecf20Sopenharmony_ci  With no debounce, the tip sense pin might be noisy on an unplug event.
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci  0 - 0ms,
468c2ecf20Sopenharmony_ci  1 - 125ms,
478c2ecf20Sopenharmony_ci  2 - 250ms,
488c2ecf20Sopenharmony_ci  3 - 500ms,
498c2ecf20Sopenharmony_ci  4 - 750ms,
508c2ecf20Sopenharmony_ci  5 - (Default) 1s,
518c2ecf20Sopenharmony_ci  6 - 1.25s,
528c2ecf20Sopenharmony_ci  7 - 1.5s,
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci  - cirrus,btn-det-init-dbnce : This sets how long the driver sleeps after
558c2ecf20Sopenharmony_ci  enabling button detection interrupts. After auto-detection and before
568c2ecf20Sopenharmony_ci  servicing button interrupts, the HS bias needs time to settle. If you
578c2ecf20Sopenharmony_ci  don't wait, there is possibility for erroneous button interrupt.
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci  0ms - 200ms,
608c2ecf20Sopenharmony_ci  Default = 100ms
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci  - cirrus,btn-det-event-dbnce : This sets how long the driver delays after
638c2ecf20Sopenharmony_ci  receiving a button press interrupt. With level detect interrupts, you want
648c2ecf20Sopenharmony_ci  to wait a small amount of time to make sure the button press is making a
658c2ecf20Sopenharmony_ci  clean connection with the bias resistors.
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci  0ms - 20ms,
688c2ecf20Sopenharmony_ci  Default = 10ms
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci  - cirrus,bias-lvls : For a level-detect headset button scheme, each button
718c2ecf20Sopenharmony_ci  will bias the mic pin to a certain voltage. To determine which button was
728c2ecf20Sopenharmony_ci  pressed, the driver will compare this biased voltage to sequential,
738c2ecf20Sopenharmony_ci  decreasing voltages and will stop when a comparator is tripped,
748c2ecf20Sopenharmony_ci  indicating a comparator voltage < bias voltage. This value represents a
758c2ecf20Sopenharmony_ci  percentage of the internally generated HS bias voltage. For different
768c2ecf20Sopenharmony_ci  hardware setups, a designer might want to tweak this. This is an array of
778c2ecf20Sopenharmony_ci  descending values for the comparator voltage.
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci  Array of 4 values
808c2ecf20Sopenharmony_ci  Each 0-63
818c2ecf20Sopenharmony_ci  < x1 x2 x3 x4 >
828c2ecf20Sopenharmony_ci  Default = < 15 8 4 1>
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ciExample:
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_cics42l42: cs42l42@48 {
888c2ecf20Sopenharmony_ci	compatible = "cirrus,cs42l42";
898c2ecf20Sopenharmony_ci	reg = <0x48>;
908c2ecf20Sopenharmony_ci	VA-supply = <&dummy_vreg>;
918c2ecf20Sopenharmony_ci	VP-supply = <&dummy_vreg>;
928c2ecf20Sopenharmony_ci	VCP-supply = <&dummy_vreg>;
938c2ecf20Sopenharmony_ci	VD_FILT-supply = <&dummy_vreg>;
948c2ecf20Sopenharmony_ci	VL-supply = <&dummy_vreg>;
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci	reset-gpios = <&axi_gpio_0 1 0>;
978c2ecf20Sopenharmony_ci	interrupt-parent = <&gpio0>;
988c2ecf20Sopenharmony_ci	interrupts = <55 8>
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci	cirrus,ts-inv = <0x00>;
1018c2ecf20Sopenharmony_ci	cirrus,ts-dbnc-rise = <0x05>;
1028c2ecf20Sopenharmony_ci	cirrus,ts-dbnc-fall = <0x00>;
1038c2ecf20Sopenharmony_ci	cirrus,btn-det-init-dbnce = <100>;
1048c2ecf20Sopenharmony_ci	cirrus,btn-det-event-dbnce = <10>;
1058c2ecf20Sopenharmony_ci	cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>;
1068c2ecf20Sopenharmony_ci	cirrus,hs-bias-ramp-rate = <0x02>;
1078c2ecf20Sopenharmony_ci};
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