18c2ecf20Sopenharmony_ci* Atmel I2S controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible: Should be "atmel,sama5d2-i2s". 58c2ecf20Sopenharmony_ci- reg: Should be the physical base address of the controller and the 68c2ecf20Sopenharmony_ci length of memory mapped region. 78c2ecf20Sopenharmony_ci- interrupts: Should contain the interrupt for the controller. 88c2ecf20Sopenharmony_ci- dmas: Should be one per channel name listed in the dma-names property, 98c2ecf20Sopenharmony_ci as described in atmel-dma.txt and dma.txt files. 108c2ecf20Sopenharmony_ci- dma-names: Two dmas have to be defined, "tx" and "rx". 118c2ecf20Sopenharmony_ci This IP also supports one shared channel for both rx and tx; 128c2ecf20Sopenharmony_ci if this mode is used, one "rx-tx" name must be used. 138c2ecf20Sopenharmony_ci- clocks: Must contain an entry for each entry in clock-names. 148c2ecf20Sopenharmony_ci Please refer to clock-bindings.txt. 158c2ecf20Sopenharmony_ci- clock-names: Should be one of each entry matching the clocks phandles list: 168c2ecf20Sopenharmony_ci - "pclk" (peripheral clock) Required. 178c2ecf20Sopenharmony_ci - "gclk" (generated clock) Optional (1). 188c2ecf20Sopenharmony_ci - "muxclk" (I2S mux clock) Optional (1). 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciOptional properties: 218c2ecf20Sopenharmony_ci- pinctrl-0: Should specify pin control groups used for this controller. 228c2ecf20Sopenharmony_ci- princtrl-names: Should contain only one value - "default". 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci(1) : Only the peripheral clock is required. The generated clock and the I2S 268c2ecf20Sopenharmony_ci mux clock are optional and should only be set together, when Master Mode 278c2ecf20Sopenharmony_ci is required. 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ciExample: 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci i2s@f8050000 { 328c2ecf20Sopenharmony_ci compatible = "atmel,sama5d2-i2s"; 338c2ecf20Sopenharmony_ci reg = <0xf8050000 0x300>; 348c2ecf20Sopenharmony_ci interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>; 358c2ecf20Sopenharmony_ci dmas = <&dma0 368c2ecf20Sopenharmony_ci (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 378c2ecf20Sopenharmony_ci AT91_XDMAC_DT_PERID(31))>, 388c2ecf20Sopenharmony_ci <&dma0 398c2ecf20Sopenharmony_ci (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 408c2ecf20Sopenharmony_ci AT91_XDMAC_DT_PERID(32))>; 418c2ecf20Sopenharmony_ci dma-names = "tx", "rx"; 428c2ecf20Sopenharmony_ci clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>; 438c2ecf20Sopenharmony_ci clock-names = "pclk", "gclk", "muxclk"; 448c2ecf20Sopenharmony_ci pinctrl-names = "default"; 458c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_i2s0_default>; 468c2ecf20Sopenharmony_ci }; 47