18c2ecf20Sopenharmony_ci* Amlogic Audio SPDIF Input 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible: 'amlogic,axg-spdifin' or 58c2ecf20Sopenharmony_ci 'amlogic,g12a-spdifin' or 68c2ecf20Sopenharmony_ci 'amlogic,sm1-spdifin' 78c2ecf20Sopenharmony_ci- interrupts: interrupt specifier for the spdif input. 88c2ecf20Sopenharmony_ci- clocks: list of clock phandle, one for each entry clock-names. 98c2ecf20Sopenharmony_ci- clock-names: should contain the following: 108c2ecf20Sopenharmony_ci * "pclk" : peripheral clock. 118c2ecf20Sopenharmony_ci * "refclk" : spdif input reference clock 128c2ecf20Sopenharmony_ci- #sound-dai-cells: must be 0. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciOptional property: 158c2ecf20Sopenharmony_ci- resets: phandle to the dedicated reset line of the spdif input. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciExample on the A113 SoC: 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_cispdifin: audio-controller@400 { 208c2ecf20Sopenharmony_ci compatible = "amlogic,axg-spdifin"; 218c2ecf20Sopenharmony_ci reg = <0x0 0x400 0x0 0x30>; 228c2ecf20Sopenharmony_ci #sound-dai-cells = <0>; 238c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>; 248c2ecf20Sopenharmony_ci clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, 258c2ecf20Sopenharmony_ci <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; 268c2ecf20Sopenharmony_ci clock-names = "pclk", "refclk"; 278c2ecf20Sopenharmony_ci}; 28