18c2ecf20Sopenharmony_ci* Amlogic Audio FIFO controllers 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible: 'amlogic,axg-toddr' or 58c2ecf20Sopenharmony_ci 'amlogic,axg-toddr' or 68c2ecf20Sopenharmony_ci 'amlogic,g12a-frddr' or 78c2ecf20Sopenharmony_ci 'amlogic,g12a-toddr' or 88c2ecf20Sopenharmony_ci 'amlogic,sm1-frddr' or 98c2ecf20Sopenharmony_ci 'amlogic,sm1-toddr' 108c2ecf20Sopenharmony_ci- reg: physical base address of the controller and length of memory 118c2ecf20Sopenharmony_ci mapped region. 128c2ecf20Sopenharmony_ci- interrupts: interrupt specifier for the fifo. 138c2ecf20Sopenharmony_ci- clocks: phandle to the fifo peripheral clock provided by the audio 148c2ecf20Sopenharmony_ci clock controller. 158c2ecf20Sopenharmony_ci- resets: list of reset phandle, one for each entry reset-names. 168c2ecf20Sopenharmony_ci- reset-names: should contain the following: 178c2ecf20Sopenharmony_ci * "arb" : memory ARB line (required) 188c2ecf20Sopenharmony_ci * "rst" : dedicated device reset line (optional) 198c2ecf20Sopenharmony_ci- #sound-dai-cells: must be 0. 208c2ecf20Sopenharmony_ci- amlogic,fifo-depth: The size of the controller's fifo in bytes. This 218c2ecf20Sopenharmony_ci is useful for determining certain configuration such 228c2ecf20Sopenharmony_ci as the flush threshold of the fifo 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciExample of FRDDR A on the A113 SoC: 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_cifrddr_a: audio-controller@1c0 { 278c2ecf20Sopenharmony_ci compatible = "amlogic,axg-frddr"; 288c2ecf20Sopenharmony_ci reg = <0x0 0x1c0 0x0 0x1c>; 298c2ecf20Sopenharmony_ci #sound-dai-cells = <0>; 308c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 318c2ecf20Sopenharmony_ci clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 328c2ecf20Sopenharmony_ci resets = <&arb AXG_ARB_FRDDR_A>; 338c2ecf20Sopenharmony_ci fifo-depth = <512>; 348c2ecf20Sopenharmony_ci}; 35