18c2ecf20Sopenharmony_ciQualcomm Always-On Subsystem side channel binding 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThis binding describes the hardware component responsible for side channel 48c2ecf20Sopenharmony_cirequests to the always-on subsystem (AOSS), used for certain power management 58c2ecf20Sopenharmony_cirequests that is not handled by the standard RPMh interface. Each client in the 68c2ecf20Sopenharmony_ciSoC has it's own block of message RAM and IRQ for communication with the AOSS. 78c2ecf20Sopenharmony_ciThe protocol used to communicate in the message RAM is known as Qualcomm 88c2ecf20Sopenharmony_ciMessaging Protocol (QMP) 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciThe AOSS side channel exposes control over a set of resources, used to control 118c2ecf20Sopenharmony_cia set of debug related clocks and to affect the low power state of resources 128c2ecf20Sopenharmony_cirelated to the secondary subsystems. These resources are exposed as a set of 138c2ecf20Sopenharmony_cipower-domains. 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci- compatible: 168c2ecf20Sopenharmony_ci Usage: required 178c2ecf20Sopenharmony_ci Value type: <string> 188c2ecf20Sopenharmony_ci Definition: must be one of: 198c2ecf20Sopenharmony_ci "qcom,sc7180-aoss-qmp" 208c2ecf20Sopenharmony_ci "qcom,sdm845-aoss-qmp" 218c2ecf20Sopenharmony_ci "qcom,sm8150-aoss-qmp" 228c2ecf20Sopenharmony_ci "qcom,sm8250-aoss-qmp" 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci- reg: 258c2ecf20Sopenharmony_ci Usage: required 268c2ecf20Sopenharmony_ci Value type: <prop-encoded-array> 278c2ecf20Sopenharmony_ci Definition: the base address and size of the message RAM for this 288c2ecf20Sopenharmony_ci client's communication with the AOSS 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci- interrupts: 318c2ecf20Sopenharmony_ci Usage: required 328c2ecf20Sopenharmony_ci Value type: <prop-encoded-array> 338c2ecf20Sopenharmony_ci Definition: should specify the AOSS message IRQ for this client 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci- mboxes: 368c2ecf20Sopenharmony_ci Usage: required 378c2ecf20Sopenharmony_ci Value type: <prop-encoded-array> 388c2ecf20Sopenharmony_ci Definition: reference to the mailbox representing the outgoing doorbell 398c2ecf20Sopenharmony_ci in APCS for this client, as described in mailbox/mailbox.txt 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci- #clock-cells: 428c2ecf20Sopenharmony_ci Usage: optional 438c2ecf20Sopenharmony_ci Value type: <u32> 448c2ecf20Sopenharmony_ci Definition: must be 0 458c2ecf20Sopenharmony_ci The single clock represents the QDSS clock. 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci- #power-domain-cells: 488c2ecf20Sopenharmony_ci Usage: optional 498c2ecf20Sopenharmony_ci Value type: <u32> 508c2ecf20Sopenharmony_ci Definition: must be 1 518c2ecf20Sopenharmony_ci The provided power-domains are: 528c2ecf20Sopenharmony_ci CDSP state (0), LPASS state (1), modem state (2), SLPI 538c2ecf20Sopenharmony_ci state (3), SPSS state (4) and Venus state (5). 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci= SUBNODES 568c2ecf20Sopenharmony_ciThe AOSS side channel also provides the controls for three cooling devices, 578c2ecf20Sopenharmony_cithese are expressed as subnodes of the QMP node. The name of the node is used 588c2ecf20Sopenharmony_cito identify the resource and must therefor be "cx", "mx" or "ebi". 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci- #cooling-cells: 618c2ecf20Sopenharmony_ci Usage: optional 628c2ecf20Sopenharmony_ci Value type: <u32> 638c2ecf20Sopenharmony_ci Definition: must be 2 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci= EXAMPLE 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ciThe following example represents the AOSS side-channel message RAM and the 688c2ecf20Sopenharmony_cimechanism exposing the power-domains, as found in SDM845. 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci aoss_qmp: qmp@c300000 { 718c2ecf20Sopenharmony_ci compatible = "qcom,sdm845-aoss-qmp"; 728c2ecf20Sopenharmony_ci reg = <0x0c300000 0x100000>; 738c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; 748c2ecf20Sopenharmony_ci mboxes = <&apss_shared 0>; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci #power-domain-cells = <1>; 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci cx_cdev: cx { 798c2ecf20Sopenharmony_ci #cooling-cells = <2>; 808c2ecf20Sopenharmony_ci }; 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci mx_cdev: mx { 838c2ecf20Sopenharmony_ci #cooling-cells = <2>; 848c2ecf20Sopenharmony_ci }; 858c2ecf20Sopenharmony_ci }; 86