18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"
58c2ecf20Sopenharmony_ci$schema: "http://devicetree.org/meta-schemas/core.yaml#"
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Atmel Timer Counter Block
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Alexandre Belloni <alexandre.belloni@bootlin.com>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription: |
138c2ecf20Sopenharmony_ci  The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
148c2ecf20Sopenharmony_ci  timer has three channels with two counters each.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciproperties:
178c2ecf20Sopenharmony_ci  compatible:
188c2ecf20Sopenharmony_ci    items:
198c2ecf20Sopenharmony_ci      - enum:
208c2ecf20Sopenharmony_ci          - atmel,at91rm9200-tcb
218c2ecf20Sopenharmony_ci          - atmel,at91sam9x5-tcb
228c2ecf20Sopenharmony_ci          - atmel,sama5d2-tcb
238c2ecf20Sopenharmony_ci      - const: simple-mfd
248c2ecf20Sopenharmony_ci      - const: syscon
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci  reg:
278c2ecf20Sopenharmony_ci    maxItems: 1
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci  interrupts:
308c2ecf20Sopenharmony_ci    description:
318c2ecf20Sopenharmony_ci      List of interrupts. One interrupt per TCB channel if available or one
328c2ecf20Sopenharmony_ci      interrupt for the TC block
338c2ecf20Sopenharmony_ci    minItems: 1
348c2ecf20Sopenharmony_ci    maxItems: 3
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci  clock-names:
378c2ecf20Sopenharmony_ci    description:
388c2ecf20Sopenharmony_ci      List of clock names. Always includes t0_clk and slow clk. Also includes
398c2ecf20Sopenharmony_ci      t1_clk and t2_clk if a clock per channel is available.
408c2ecf20Sopenharmony_ci    minItems: 2
418c2ecf20Sopenharmony_ci    maxItems: 4
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci  clocks:
448c2ecf20Sopenharmony_ci    minItems: 2
458c2ecf20Sopenharmony_ci    maxItems: 4
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci  '#address-cells':
488c2ecf20Sopenharmony_ci    const: 1
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci  '#size-cells':
518c2ecf20Sopenharmony_ci    const: 0
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_cipatternProperties:
548c2ecf20Sopenharmony_ci  "^timer@[0-2]$":
558c2ecf20Sopenharmony_ci    description: The timer block channels that are used as timers or counters.
568c2ecf20Sopenharmony_ci    type: object
578c2ecf20Sopenharmony_ci    properties:
588c2ecf20Sopenharmony_ci      compatible:
598c2ecf20Sopenharmony_ci        items:
608c2ecf20Sopenharmony_ci          - enum:
618c2ecf20Sopenharmony_ci              - atmel,tcb-timer
628c2ecf20Sopenharmony_ci              - microchip,tcb-capture
638c2ecf20Sopenharmony_ci      reg:
648c2ecf20Sopenharmony_ci        description:
658c2ecf20Sopenharmony_ci          List of channels to use for this particular timer. In Microchip TCB capture
668c2ecf20Sopenharmony_ci          mode channels are registered as a counter devices, for the qdec mode TCB0's
678c2ecf20Sopenharmony_ci          channel <0> and <1> are required.
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci        minItems: 1
708c2ecf20Sopenharmony_ci        maxItems: 3
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_ci    required:
738c2ecf20Sopenharmony_ci      - compatible
748c2ecf20Sopenharmony_ci      - reg
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ciallOf:
778c2ecf20Sopenharmony_ci  - if:
788c2ecf20Sopenharmony_ci      properties:
798c2ecf20Sopenharmony_ci        compatible:
808c2ecf20Sopenharmony_ci          contains:
818c2ecf20Sopenharmony_ci            const: atmel,sama5d2-tcb
828c2ecf20Sopenharmony_ci    then:
838c2ecf20Sopenharmony_ci      properties:
848c2ecf20Sopenharmony_ci        clocks:
858c2ecf20Sopenharmony_ci          minItems: 3
868c2ecf20Sopenharmony_ci          maxItems: 3
878c2ecf20Sopenharmony_ci        clock-names:
888c2ecf20Sopenharmony_ci          items:
898c2ecf20Sopenharmony_ci            - const: t0_clk
908c2ecf20Sopenharmony_ci            - const: gclk
918c2ecf20Sopenharmony_ci            - const: slow_clk
928c2ecf20Sopenharmony_ci    else:
938c2ecf20Sopenharmony_ci      properties:
948c2ecf20Sopenharmony_ci        clocks:
958c2ecf20Sopenharmony_ci          minItems: 2
968c2ecf20Sopenharmony_ci          maxItems: 4
978c2ecf20Sopenharmony_ci        clock-names:
988c2ecf20Sopenharmony_ci          oneOf:
998c2ecf20Sopenharmony_ci            - items:
1008c2ecf20Sopenharmony_ci                - const: t0_clk
1018c2ecf20Sopenharmony_ci                - const: slow_clk
1028c2ecf20Sopenharmony_ci            - items:
1038c2ecf20Sopenharmony_ci                - const: t0_clk
1048c2ecf20Sopenharmony_ci                - const: t1_clk
1058c2ecf20Sopenharmony_ci                - const: t2_clk
1068c2ecf20Sopenharmony_ci                - const: slow_clk
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_cirequired:
1098c2ecf20Sopenharmony_ci  - compatible
1108c2ecf20Sopenharmony_ci  - reg
1118c2ecf20Sopenharmony_ci  - interrupts
1128c2ecf20Sopenharmony_ci  - clocks
1138c2ecf20Sopenharmony_ci  - clock-names
1148c2ecf20Sopenharmony_ci  - '#address-cells'
1158c2ecf20Sopenharmony_ci  - '#size-cells'
1168c2ecf20Sopenharmony_ci
1178c2ecf20Sopenharmony_ciadditionalProperties: false
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ciexamples:
1208c2ecf20Sopenharmony_ci  - |
1218c2ecf20Sopenharmony_ci    /* One interrupt per TC block: */
1228c2ecf20Sopenharmony_ci        tcb0: timer@fff7c000 {
1238c2ecf20Sopenharmony_ci                compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
1248c2ecf20Sopenharmony_ci                #address-cells = <1>;
1258c2ecf20Sopenharmony_ci                #size-cells = <0>;
1268c2ecf20Sopenharmony_ci                reg = <0xfff7c000 0x100>;
1278c2ecf20Sopenharmony_ci                interrupts = <18 4>;
1288c2ecf20Sopenharmony_ci                clocks = <&tcb0_clk>, <&clk32k>;
1298c2ecf20Sopenharmony_ci                clock-names = "t0_clk", "slow_clk";
1308c2ecf20Sopenharmony_ci
1318c2ecf20Sopenharmony_ci                timer@0 {
1328c2ecf20Sopenharmony_ci                        compatible = "atmel,tcb-timer";
1338c2ecf20Sopenharmony_ci                        reg = <0>, <1>;
1348c2ecf20Sopenharmony_ci                };
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci                timer@2 {
1378c2ecf20Sopenharmony_ci                        compatible = "atmel,tcb-timer";
1388c2ecf20Sopenharmony_ci                        reg = <2>;
1398c2ecf20Sopenharmony_ci                };
1408c2ecf20Sopenharmony_ci        };
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_ci    /* One interrupt per TC channel in a TC block: */
1438c2ecf20Sopenharmony_ci        tcb1: timer@fffdc000 {
1448c2ecf20Sopenharmony_ci                compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
1458c2ecf20Sopenharmony_ci                #address-cells = <1>;
1468c2ecf20Sopenharmony_ci                #size-cells = <0>;
1478c2ecf20Sopenharmony_ci                reg = <0xfffdc000 0x100>;
1488c2ecf20Sopenharmony_ci                interrupts = <26 4>, <27 4>, <28 4>;
1498c2ecf20Sopenharmony_ci                clocks = <&tcb1_clk>, <&clk32k>;
1508c2ecf20Sopenharmony_ci                clock-names = "t0_clk", "slow_clk";
1518c2ecf20Sopenharmony_ci
1528c2ecf20Sopenharmony_ci                timer@0 {
1538c2ecf20Sopenharmony_ci                        compatible = "atmel,tcb-timer";
1548c2ecf20Sopenharmony_ci                        reg = <0>;
1558c2ecf20Sopenharmony_ci                };
1568c2ecf20Sopenharmony_ci
1578c2ecf20Sopenharmony_ci                timer@1 {
1588c2ecf20Sopenharmony_ci                        compatible = "atmel,tcb-timer";
1598c2ecf20Sopenharmony_ci                        reg = <1>;
1608c2ecf20Sopenharmony_ci                };
1618c2ecf20Sopenharmony_ci        };
1628c2ecf20Sopenharmony_ci    /* TCB0 Capture with QDEC: */
1638c2ecf20Sopenharmony_ci        timer@f800c000 {
1648c2ecf20Sopenharmony_ci                compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
1658c2ecf20Sopenharmony_ci                #address-cells = <1>;
1668c2ecf20Sopenharmony_ci                #size-cells = <0>;
1678c2ecf20Sopenharmony_ci                reg = <0xfff7c000 0x100>;
1688c2ecf20Sopenharmony_ci                interrupts = <18 4>;
1698c2ecf20Sopenharmony_ci                clocks = <&tcb0_clk>, <&clk32k>;
1708c2ecf20Sopenharmony_ci                clock-names = "t0_clk", "slow_clk";
1718c2ecf20Sopenharmony_ci
1728c2ecf20Sopenharmony_ci                timer@0 {
1738c2ecf20Sopenharmony_ci                        compatible = "microchip,tcb-capture";
1748c2ecf20Sopenharmony_ci                        reg = <0>, <1>;
1758c2ecf20Sopenharmony_ci                };
1768c2ecf20Sopenharmony_ci
1778c2ecf20Sopenharmony_ci                timer@2 {
1788c2ecf20Sopenharmony_ci                        compatible = "atmel,tcb-timer";
1798c2ecf20Sopenharmony_ci                        reg = <2>;
1808c2ecf20Sopenharmony_ci                };
1818c2ecf20Sopenharmony_ci        };
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