18c2ecf20Sopenharmony_ciXilinx Axi Uartlite controller Device Tree Bindings 28c2ecf20Sopenharmony_ci--------------------------------------------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciRequired properties: 58c2ecf20Sopenharmony_ci- compatible : Can be either of 68c2ecf20Sopenharmony_ci "xlnx,xps-uartlite-1.00.a" 78c2ecf20Sopenharmony_ci "xlnx,opb-uartlite-1.00.b" 88c2ecf20Sopenharmony_ci- reg : Physical base address and size of the Axi Uartlite 98c2ecf20Sopenharmony_ci registers map. 108c2ecf20Sopenharmony_ci- interrupts : Should contain the UART controller interrupt. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciOptional properties: 138c2ecf20Sopenharmony_ci- port-number : Set Uart port number 148c2ecf20Sopenharmony_ci- clock-names : Should be "s_axi_aclk" 158c2ecf20Sopenharmony_ci- clocks : Input clock specifier. Refer to common clock bindings. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciExample: 188c2ecf20Sopenharmony_ciserial@800c0000 { 198c2ecf20Sopenharmony_ci compatible = "xlnx,xps-uartlite-1.00.a"; 208c2ecf20Sopenharmony_ci reg = <0x0 0x800c0000 0x10000>; 218c2ecf20Sopenharmony_ci interrupts = <0x0 0x6e 0x1>; 228c2ecf20Sopenharmony_ci port-number = <0>; 238c2ecf20Sopenharmony_ci}; 24