18c2ecf20Sopenharmony_ci* MSM Serial UARTDM
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThe MSM serial UARTDM hardware is designed for high-speed use cases where the
48c2ecf20Sopenharmony_citransmit and/or receive channels can be offloaded to a dma-engine. From a
58c2ecf20Sopenharmony_cisoftware perspective it's mostly compatible with the MSM serial UART except
68c2ecf20Sopenharmony_cithat it supports reading and writing multiple characters at a time.
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ciRequired properties:
98c2ecf20Sopenharmony_ci- compatible: Should contain at least "qcom,msm-uartdm".
108c2ecf20Sopenharmony_ci              A more specific property should be specified as follows depending
118c2ecf20Sopenharmony_ci	      on the version:
128c2ecf20Sopenharmony_ci		"qcom,msm-uartdm-v1.1"
138c2ecf20Sopenharmony_ci		"qcom,msm-uartdm-v1.2"
148c2ecf20Sopenharmony_ci		"qcom,msm-uartdm-v1.3"
158c2ecf20Sopenharmony_ci		"qcom,msm-uartdm-v1.4"
168c2ecf20Sopenharmony_ci- reg: Should contain UART register locations and lengths. The first
178c2ecf20Sopenharmony_ci       register shall specify the main control registers. An optional second
188c2ecf20Sopenharmony_ci       register location shall specify the GSBI control region.
198c2ecf20Sopenharmony_ci       "qcom,msm-uartdm-v1.3" is the only compatible value that might
208c2ecf20Sopenharmony_ci       need the GSBI control region.
218c2ecf20Sopenharmony_ci- interrupts: Should contain UART interrupt.
228c2ecf20Sopenharmony_ci- clocks: Should contain the core clock and the AHB clock.
238c2ecf20Sopenharmony_ci- clock-names: Should be "core" for the core clock and "iface" for the
248c2ecf20Sopenharmony_ci	       AHB clock.
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ciOptional properties:
278c2ecf20Sopenharmony_ci- dmas: Should contain dma specifiers for transmit and receive channels
288c2ecf20Sopenharmony_ci- dma-names: Should contain "tx" for transmit and "rx" for receive channels
298c2ecf20Sopenharmony_ci- qcom,tx-crci: Identificator <u32> for Client Rate Control Interface to be
308c2ecf20Sopenharmony_ci           used with TX DMA channel. Required when using DMA for transmission
318c2ecf20Sopenharmony_ci           with UARTDM v1.3 and below.
328c2ecf20Sopenharmony_ci- qcom,rx-crci: Identificator <u32> for Client Rate Control Interface to be
338c2ecf20Sopenharmony_ci           used with RX DMA channel. Required when using DMA for reception
348c2ecf20Sopenharmony_ci           with UARTDM v1.3 and below.
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ciNote: Aliases may be defined to ensure the correct ordering of the UARTs.
378c2ecf20Sopenharmony_ciThe alias serialN will result in the UART being assigned port N.  If any
388c2ecf20Sopenharmony_ciserialN alias exists, then an alias must exist for each enabled UART.  The
398c2ecf20Sopenharmony_ciserialN aliases should be in a .dts file instead of in a .dtsi file.
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ciExamples:
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci- A uartdm v1.4 device with dma capabilities.
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci	serial@f991e000 {
468c2ecf20Sopenharmony_ci		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
478c2ecf20Sopenharmony_ci		reg = <0xf991e000 0x1000>;
488c2ecf20Sopenharmony_ci		interrupts = <0 108 0x0>;
498c2ecf20Sopenharmony_ci		clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>;
508c2ecf20Sopenharmony_ci		clock-names = "core", "iface";
518c2ecf20Sopenharmony_ci		dmas = <&dma0 0>, <&dma0 1>;
528c2ecf20Sopenharmony_ci		dma-names = "tx", "rx";
538c2ecf20Sopenharmony_ci	};
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci- A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci	serial@19c40000 {
588c2ecf20Sopenharmony_ci		compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
598c2ecf20Sopenharmony_ci		reg = <0x19c40000 0x1000>,
608c2ecf20Sopenharmony_ci		<0x19c00000 0x1000>;
618c2ecf20Sopenharmony_ci		interrupts = <0 195 0x0>;
628c2ecf20Sopenharmony_ci		clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
638c2ecf20Sopenharmony_ci		clock-names = "core", "iface";
648c2ecf20Sopenharmony_ci	};
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci- serialN alias.
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci	aliases {
698c2ecf20Sopenharmony_ci		serial0 = &uarta;
708c2ecf20Sopenharmony_ci		serial1 = &uartc;
718c2ecf20Sopenharmony_ci		serial2 = &uartb;
728c2ecf20Sopenharmony_ci	};
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci	uarta: serial@12490000 {
758c2ecf20Sopenharmony_ci	};
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci	uartb: serial@16340000 {
788c2ecf20Sopenharmony_ci	};
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci	uartc: serial@1a240000 {
818c2ecf20Sopenharmony_ci	};
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