18c2ecf20Sopenharmony_ciLantiq SoC ASC serial controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible : Should be "lantiq,asc" 58c2ecf20Sopenharmony_ci- reg : Address and length of the register set for the device 68c2ecf20Sopenharmony_ci- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier 78c2ecf20Sopenharmony_ci depends on the interrupt-parent interrupt controller. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciOptional properties: 108c2ecf20Sopenharmony_ci- clocks: Should contain frequency clock and gate clock 118c2ecf20Sopenharmony_ci- clock-names: Should be "freq" and "asc" 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciExample: 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciasc0: serial@16600000 { 168c2ecf20Sopenharmony_ci compatible = "lantiq,asc"; 178c2ecf20Sopenharmony_ci reg = <0x16600000 0x100000>; 188c2ecf20Sopenharmony_ci interrupt-parent = <&gic>; 198c2ecf20Sopenharmony_ci interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>, 208c2ecf20Sopenharmony_ci <GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>, 218c2ecf20Sopenharmony_ci <GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>; 228c2ecf20Sopenharmony_ci clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>; 238c2ecf20Sopenharmony_ci clock-names = "freq", "asc"; 248c2ecf20Sopenharmony_ci}; 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciasc1: serial@e100c00 { 278c2ecf20Sopenharmony_ci compatible = "lantiq,asc"; 288c2ecf20Sopenharmony_ci reg = <0xE100C00 0x400>; 298c2ecf20Sopenharmony_ci interrupt-parent = <&icu0>; 308c2ecf20Sopenharmony_ci interrupts = <112 113 114>; 318c2ecf20Sopenharmony_ci}; 32