18c2ecf20Sopenharmony_ciBinding for Cadence UART Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible : 58c2ecf20Sopenharmony_ci Use "xlnx,xuartps","cdns,uart-r1p8" for Zynq-7xxx SoC. 68c2ecf20Sopenharmony_ci Use "xlnx,zynqmp-uart","cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC. 78c2ecf20Sopenharmony_ci- reg: Should contain UART controller registers location and length. 88c2ecf20Sopenharmony_ci- interrupts: Should contain UART controller interrupts. 98c2ecf20Sopenharmony_ci- clocks: Must contain phandles to the UART clocks 108c2ecf20Sopenharmony_ci See ../clocks/clock-bindings.txt for details. 118c2ecf20Sopenharmony_ci- clock-names: Tuple to identify input clocks, must contain "uart_clk" and "pclk" 128c2ecf20Sopenharmony_ci See ../clocks/clock-bindings.txt for details. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciOptional properties: 168c2ecf20Sopenharmony_ci- cts-override : Override the CTS modem status signal. This signal will 178c2ecf20Sopenharmony_ci always be reported as active instead of being obtained from the modem status 188c2ecf20Sopenharmony_ci register. Define this if your serial port does not use this pin 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciExample: 218c2ecf20Sopenharmony_ci uart@e0000000 { 228c2ecf20Sopenharmony_ci compatible = "cdns,uart-r1p8"; 238c2ecf20Sopenharmony_ci clocks = <&clkc 23>, <&clkc 40>; 248c2ecf20Sopenharmony_ci clock-names = "uart_clk", "pclk"; 258c2ecf20Sopenharmony_ci reg = <0xE0000000 0x1000>; 268c2ecf20Sopenharmony_ci interrupts = <0 27 4>; 278c2ecf20Sopenharmony_ci }; 28