18c2ecf20Sopenharmony_ci* BCM63xx UART 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci- compatible: "brcm,bcm6345-uart" 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci- reg: The base address of the UART register bank. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci- interrupts: A single interrupt specifier. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci- clocks: Clock driving the hardware; used to figure out the baud rate 128c2ecf20Sopenharmony_ci divisor. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciOptional properties: 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci- clock-names: Should be "refclk". 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciExample: 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci uart0: serial@14e00520 { 228c2ecf20Sopenharmony_ci compatible = "brcm,bcm6345-uart"; 238c2ecf20Sopenharmony_ci reg = <0x14e00520 0x18>; 248c2ecf20Sopenharmony_ci interrupt-parent = <&periph_intc>; 258c2ecf20Sopenharmony_ci interrupts = <2>; 268c2ecf20Sopenharmony_ci clocks = <&periph_clk>; 278c2ecf20Sopenharmony_ci clock-names = "refclk"; 288c2ecf20Sopenharmony_ci }; 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci clocks { 318c2ecf20Sopenharmony_ci periph_clk: periph_clk@0 { 328c2ecf20Sopenharmony_ci compatible = "fixed-clock"; 338c2ecf20Sopenharmony_ci #clock-cells = <0>; 348c2ecf20Sopenharmony_ci clock-frequency = <54000000>; 358c2ecf20Sopenharmony_ci }; 368c2ecf20Sopenharmony_ci }; 37