18c2ecf20Sopenharmony_ciARM MPS2 UART 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible : Should be "arm,mps2-uart" 58c2ecf20Sopenharmony_ci- reg : Address and length of the register set 68c2ecf20Sopenharmony_ci- interrupts : Reference to the UART RX, TX and overrun interrupts 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired clocking property: 98c2ecf20Sopenharmony_ci- clocks : The input clock of the UART 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciExamples: 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciuart0: serial@40004000 { 158c2ecf20Sopenharmony_ci compatible = "arm,mps2-uart"; 168c2ecf20Sopenharmony_ci reg = <0x40004000 0x1000>; 178c2ecf20Sopenharmony_ci interrupts = <0 1 12>; 188c2ecf20Sopenharmony_ci clocks = <&sysclk>; 198c2ecf20Sopenharmony_ci}; 20