18c2ecf20Sopenharmony_ci* Xilinx Zynq Ultrascale+ MPSoC Real Time Clock 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRTC controller for the Xilinx Zynq MPSoC Real Time Clock 48c2ecf20Sopenharmony_ciSeparate IRQ lines for seconds and alarm 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci- compatible: Should be "xlnx,zynqmp-rtc" 88c2ecf20Sopenharmony_ci- reg: Physical base address of the controller and length 98c2ecf20Sopenharmony_ci of memory mapped region. 108c2ecf20Sopenharmony_ci- interrupts: IRQ lines for the RTC. 118c2ecf20Sopenharmony_ci- interrupt-names: interrupt line names eg. "sec" "alarm" 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciOptional: 148c2ecf20Sopenharmony_ci- calibration: calibration value for 1 sec period which will 158c2ecf20Sopenharmony_ci be programmed directly to calibration register 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciExample: 188c2ecf20Sopenharmony_cirtc: rtc@ffa60000 { 198c2ecf20Sopenharmony_ci compatible = "xlnx,zynqmp-rtc"; 208c2ecf20Sopenharmony_ci reg = <0x0 0xffa60000 0x100>; 218c2ecf20Sopenharmony_ci interrupt-parent = <&gic>; 228c2ecf20Sopenharmony_ci interrupts = <0 26 4>, <0 27 4>; 238c2ecf20Sopenharmony_ci interrupt-names = "alarm", "sec"; 248c2ecf20Sopenharmony_ci calibration = <0x198233>; 258c2ecf20Sopenharmony_ci}; 26