18c2ecf20Sopenharmony_ci* STMP3xxx/i.MX28 Time Clock controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci- compatible: should be one of the following.
58c2ecf20Sopenharmony_ci    * "fsl,stmp3xxx-rtc"
68c2ecf20Sopenharmony_ci- reg: physical base address of the controller and length of memory mapped
78c2ecf20Sopenharmony_ci  region.
88c2ecf20Sopenharmony_ci- interrupts: rtc alarm interrupt
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ciOptional properties:
118c2ecf20Sopenharmony_ci- stmp,crystal-freq: override crystal frequency as determined from fuse bits.
128c2ecf20Sopenharmony_ci  Only <32000> and <32768> are possible for the hardware.  Use <0> for
138c2ecf20Sopenharmony_ci  "no crystal".
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciExample:
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_cirtc@80056000 {
188c2ecf20Sopenharmony_ci	compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
198c2ecf20Sopenharmony_ci	reg = <0x80056000 2000>;
208c2ecf20Sopenharmony_ci	interrupts = <29>;
218c2ecf20Sopenharmony_ci};
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