18c2ecf20Sopenharmony_ciIntersil ISL12057 I2C RTC/Alarm chip 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciISL12057 is a trivial I2C device (it has simple device tree bindings, 48c2ecf20Sopenharmony_ciconsisting of a compatible field, an address and possibly an interrupt 58c2ecf20Sopenharmony_ciline). 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciNonetheless, it also supports an option boolean property 88c2ecf20Sopenharmony_ci("wakeup-source") to handle the specific use-case found 98c2ecf20Sopenharmony_cion at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104 108c2ecf20Sopenharmony_ciand 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip 118c2ecf20Sopenharmony_ci(associated with the alarm supported by the driver) is not connected 128c2ecf20Sopenharmony_cito the SoC but to a PMIC. It allows the device to be powered up when 138c2ecf20Sopenharmony_ciRTC alarm rings. In order to mark the device has a wakeup source and 148c2ecf20Sopenharmony_ciget access to the 'wakealarm' sysfs entry, this specific property can 158c2ecf20Sopenharmony_cibe set when the IRQ#2 pin of the chip is not connected to the SoC but 168c2ecf20Sopenharmony_cican wake up the device. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciRequired properties supported by the device: 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci - "compatible": must be "isil,isl12057" 218c2ecf20Sopenharmony_ci - "reg": I2C bus address of the device 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ciOptional properties: 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci - "wakeup-source": mark the chip as a wakeup source, independently of 268c2ecf20Sopenharmony_ci the availability of an IRQ line connected to the SoC. 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ciExample isl12057 node without IRQ#2 pin connected (no alarm support): 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci isl12057: isl12057@68 { 328c2ecf20Sopenharmony_ci compatible = "isil,isl12057"; 338c2ecf20Sopenharmony_ci reg = <0x68>; 348c2ecf20Sopenharmony_ci }; 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ciExample isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note 388c2ecf20Sopenharmony_cithat the pinctrl-related properties below are given for completeness and 398c2ecf20Sopenharmony_cimay not be required or may be different depending on your system or 408c2ecf20Sopenharmony_ciSoC, and the main function of the MPP used as IRQ line, i.e. 418c2ecf20Sopenharmony_ci"interrupt-parent" and "interrupts" are usually sufficient): 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci pinctrl { 448c2ecf20Sopenharmony_ci ... 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci rtc_alarm_pin: rtc_alarm_pin { 478c2ecf20Sopenharmony_ci marvell,pins = "mpp6"; 488c2ecf20Sopenharmony_ci marvell,function = "gpio"; 498c2ecf20Sopenharmony_ci }; 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci ... 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci }; 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci ... 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci isl12057: isl12057@68 { 588c2ecf20Sopenharmony_ci compatible = "isil,isl12057"; 598c2ecf20Sopenharmony_ci reg = <0x68>; 608c2ecf20Sopenharmony_ci pinctrl-0 = <&rtc_alarm_pin>; 618c2ecf20Sopenharmony_ci pinctrl-names = "default"; 628c2ecf20Sopenharmony_ci interrupt-parent = <&gpio0>; 638c2ecf20Sopenharmony_ci interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 648c2ecf20Sopenharmony_ci }; 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ciExample isl12057 node without IRQ#2 pin connected to the SoC but to a 688c2ecf20Sopenharmony_ciPMIC, allowing the device to be started based on configured alarm: 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci isl12057: isl12057@68 { 718c2ecf20Sopenharmony_ci compatible = "isil,isl12057"; 728c2ecf20Sopenharmony_ci reg = <0x68>; 738c2ecf20Sopenharmony_ci wakeup-source; 748c2ecf20Sopenharmony_ci }; 75