18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Freescale i.MX System Reset Controller
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Philipp Zabel <p.zabel@pengutronix.de>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription: |
138c2ecf20Sopenharmony_ci  The system reset controller can be used to reset the GPU, VPU,
148c2ecf20Sopenharmony_ci  IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
158c2ecf20Sopenharmony_ci  nodes should specify the reset line on the SRC in their resets
168c2ecf20Sopenharmony_ci  property, containing a phandle to the SRC device node and a
178c2ecf20Sopenharmony_ci  RESET_INDEX specifying which module to reset, as described in
188c2ecf20Sopenharmony_ci  reset.txt
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci  The following RESET_INDEX values are valid for i.MX5:
218c2ecf20Sopenharmony_ci    GPU_RESET     0
228c2ecf20Sopenharmony_ci    VPU_RESET     1
238c2ecf20Sopenharmony_ci    IPU1_RESET    2
248c2ecf20Sopenharmony_ci    OPEN_VG_RESET 3
258c2ecf20Sopenharmony_ci  The following additional RESET_INDEX value is valid for i.MX6:
268c2ecf20Sopenharmony_ci    IPU2_RESET    4
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ciproperties:
298c2ecf20Sopenharmony_ci  compatible:
308c2ecf20Sopenharmony_ci    oneOf:
318c2ecf20Sopenharmony_ci      - const: "fsl,imx51-src"
328c2ecf20Sopenharmony_ci      - items:
338c2ecf20Sopenharmony_ci          - const: "fsl,imx50-src"
348c2ecf20Sopenharmony_ci          - const: "fsl,imx51-src"
358c2ecf20Sopenharmony_ci      - items:
368c2ecf20Sopenharmony_ci          - const: "fsl,imx53-src"
378c2ecf20Sopenharmony_ci          - const: "fsl,imx51-src"
388c2ecf20Sopenharmony_ci      - items:
398c2ecf20Sopenharmony_ci          - const: "fsl,imx6q-src"
408c2ecf20Sopenharmony_ci          - const: "fsl,imx51-src"
418c2ecf20Sopenharmony_ci      - items:
428c2ecf20Sopenharmony_ci          - const: "fsl,imx6sx-src"
438c2ecf20Sopenharmony_ci          - const: "fsl,imx51-src"
448c2ecf20Sopenharmony_ci      - items:
458c2ecf20Sopenharmony_ci          - const: "fsl,imx6sl-src"
468c2ecf20Sopenharmony_ci          - const: "fsl,imx51-src"
478c2ecf20Sopenharmony_ci      - items:
488c2ecf20Sopenharmony_ci          - const: "fsl,imx6ul-src"
498c2ecf20Sopenharmony_ci          - const: "fsl,imx51-src"
508c2ecf20Sopenharmony_ci      - items:
518c2ecf20Sopenharmony_ci          - const: "fsl,imx6sll-src"
528c2ecf20Sopenharmony_ci          - const: "fsl,imx51-src"
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci  reg:
558c2ecf20Sopenharmony_ci    maxItems: 1
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci  interrupts:
588c2ecf20Sopenharmony_ci    items:
598c2ecf20Sopenharmony_ci      - description: SRC interrupt
608c2ecf20Sopenharmony_ci      - description: CPU WDOG interrupts out of SRC
618c2ecf20Sopenharmony_ci    minItems: 1
628c2ecf20Sopenharmony_ci    maxItems: 2
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci  '#reset-cells':
658c2ecf20Sopenharmony_ci    const: 1
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_cirequired:
688c2ecf20Sopenharmony_ci  - compatible
698c2ecf20Sopenharmony_ci  - reg
708c2ecf20Sopenharmony_ci  - interrupts
718c2ecf20Sopenharmony_ci  - '#reset-cells'
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ciadditionalProperties: false
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ciexamples:
768c2ecf20Sopenharmony_ci  - |
778c2ecf20Sopenharmony_ci    reset-controller@73fd0000 {
788c2ecf20Sopenharmony_ci        compatible = "fsl,imx51-src";
798c2ecf20Sopenharmony_ci        reg = <0x73fd0000 0x4000>;
808c2ecf20Sopenharmony_ci        interrupts = <75>;
818c2ecf20Sopenharmony_ci        #reset-cells = <1>;
828c2ecf20Sopenharmony_ci    };
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