18c2ecf20Sopenharmony_ciBroadcom STB SW_INIT-style reset controller 28c2ecf20Sopenharmony_ci=========================================== 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciBroadcom STB SoCs have a SW_INIT-style reset controller with separate 58c2ecf20Sopenharmony_ciSET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit 68c2ecf20Sopenharmony_cireset lines. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciPlease also refer to reset.txt in this directory for common reset 98c2ecf20Sopenharmony_cicontroller binding usage. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciRequired properties: 128c2ecf20Sopenharmony_ci- compatible: should be brcm,brcmstb-reset 138c2ecf20Sopenharmony_ci- reg: register base and length 148c2ecf20Sopenharmony_ci- #reset-cells: must be set to 1 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciExample: 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci reset: reset-controller@8404318 { 198c2ecf20Sopenharmony_ci compatible = "brcm,brcmstb-reset"; 208c2ecf20Sopenharmony_ci reg = <0x8404318 0x30>; 218c2ecf20Sopenharmony_ci #reset-cells = <1>; 228c2ecf20Sopenharmony_ci }; 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci ðernet_switch { 258c2ecf20Sopenharmony_ci resets = <&reset 26>; 268c2ecf20Sopenharmony_ci reset-names = "switch"; 278c2ecf20Sopenharmony_ci }; 28