18c2ecf20Sopenharmony_ciTI Keystone DSP devices 28c2ecf20Sopenharmony_ci======================= 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core 58c2ecf20Sopenharmony_cisub-systems that are used to offload some of the processor-intensive tasks or 68c2ecf20Sopenharmony_cialgorithms, for achieving various system level goals. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciThese processor sub-systems usually contain additional sub-modules like L1 98c2ecf20Sopenharmony_ciand/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller, 108c2ecf20Sopenharmony_cia dedicated local power/sleep controller etc. The DSP processor core in 118c2ecf20Sopenharmony_ciKeystone 2 SoCs is usually a TMS320C66x CorePac processor. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciDSP Device Node: 148c2ecf20Sopenharmony_ci================ 158c2ecf20Sopenharmony_ciEach DSP Core sub-system is represented as a single DT node, and should also 168c2ecf20Sopenharmony_cihave an alias with the stem 'rproc' defined. Each node has a number of required 178c2ecf20Sopenharmony_cior optional properties that enable the OS running on the host processor (ARM 188c2ecf20Sopenharmony_ciCorePac) to perform the device management of the remote processor and to 198c2ecf20Sopenharmony_cicommunicate with the remote processor. 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciRequired properties: 228c2ecf20Sopenharmony_ci-------------------- 238c2ecf20Sopenharmony_ciThe following are the mandatory properties: 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci- compatible: Should be one of the following, 268c2ecf20Sopenharmony_ci "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs 278c2ecf20Sopenharmony_ci "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs 288c2ecf20Sopenharmony_ci "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs 298c2ecf20Sopenharmony_ci "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci- reg: Should contain an entry for each value in 'reg-names'. 328c2ecf20Sopenharmony_ci Each entry should have the memory region's start address 338c2ecf20Sopenharmony_ci and the size of the region, the representation matching 348c2ecf20Sopenharmony_ci the parent node's '#address-cells' and '#size-cells' values. 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci- reg-names: Should contain strings with the following names, each 378c2ecf20Sopenharmony_ci representing a specific internal memory region, and 388c2ecf20Sopenharmony_ci should be defined in this order, 398c2ecf20Sopenharmony_ci "l2sram", "l1pram", "l1dram" 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci- ti,syscon-dev: Should be a pair of the phandle to the Keystone Device 428c2ecf20Sopenharmony_ci State Control node, and the register offset of the DSP 438c2ecf20Sopenharmony_ci boot address register within that node's address space. 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci- resets: Should contain the phandle to the reset controller node 468c2ecf20Sopenharmony_ci managing the resets for this device, and a reset 478c2ecf20Sopenharmony_ci specifier. Please refer to either of the following reset 488c2ecf20Sopenharmony_ci bindings for the reset argument specifier as per SoC, 498c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/reset/ti-syscon-reset.txt 508c2ecf20Sopenharmony_ci for 66AK2HK/66AK2L/66AK2E SoCs or, 518c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/reset/ti,sci-reset.txt 528c2ecf20Sopenharmony_ci for 66AK2G SoCs 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci- interrupts: Should contain an entry for each value in 'interrupt-names'. 558c2ecf20Sopenharmony_ci Each entry should have the interrupt source number used by 568c2ecf20Sopenharmony_ci the remote processor to the host processor. The values should 578c2ecf20Sopenharmony_ci follow the interrupt-specifier format as dictated by the 588c2ecf20Sopenharmony_ci 'interrupt-parent' node. The purpose of each is as per the 598c2ecf20Sopenharmony_ci description in the 'interrupt-names' property. 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci- interrupt-names: Should contain strings with the following names, each 628c2ecf20Sopenharmony_ci representing a specific interrupt, 638c2ecf20Sopenharmony_ci "vring" - interrupt for virtio based IPC 648c2ecf20Sopenharmony_ci "exception" - interrupt for exception notification 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci- kick-gpios: Should specify the gpio device needed for the virtio IPC 678c2ecf20Sopenharmony_ci stack. This will be used to interrupt the remote processor. 688c2ecf20Sopenharmony_ci The gpio device to be used is as per the bindings in, 698c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ciSoC-specific Required properties: 728c2ecf20Sopenharmony_ci--------------------------------- 738c2ecf20Sopenharmony_ciThe following are mandatory properties for Keystone 2 66AK2HK, 66AK2L and 66AK2E 748c2ecf20Sopenharmony_ciSoCs only: 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci- clocks: Should contain the device's input clock, and should be 778c2ecf20Sopenharmony_ci defined as per the bindings in, 788c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/clock/keystone-gate.txt 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ciThe following are mandatory properties for Keystone 2 66AK2G SoCs only: 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci- power-domains: Should contain a phandle to a PM domain provider node 838c2ecf20Sopenharmony_ci and an args specifier containing the DSP device id 848c2ecf20Sopenharmony_ci value. This property is as per the binding, 858c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ciOptional properties: 888c2ecf20Sopenharmony_ci-------------------- 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci- memory-region: phandle to the reserved memory node to be associated 918c2ecf20Sopenharmony_ci with the remoteproc device. The reserved memory node 928c2ecf20Sopenharmony_ci can be a CMA memory node, and should be defined as 938c2ecf20Sopenharmony_ci per the bindings in 948c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ciExamples: 988c2ecf20Sopenharmony_ci--------- 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci1. 1018c2ecf20Sopenharmony_ci /* 66AK2H/K DSP aliases */ 1028c2ecf20Sopenharmony_ci aliases { 1038c2ecf20Sopenharmony_ci rproc0 = &dsp0; 1048c2ecf20Sopenharmony_ci rproc1 = &dsp1; 1058c2ecf20Sopenharmony_ci rproc2 = &dsp2; 1068c2ecf20Sopenharmony_ci rproc3 = &dsp3; 1078c2ecf20Sopenharmony_ci rproc4 = &dsp4; 1088c2ecf20Sopenharmony_ci rproc5 = &dsp5; 1098c2ecf20Sopenharmony_ci rproc6 = &dsp6; 1108c2ecf20Sopenharmony_ci rproc7 = &dsp7; 1118c2ecf20Sopenharmony_ci }; 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci /* 66AK2H/K DSP memory node */ 1148c2ecf20Sopenharmony_ci reserved-memory { 1158c2ecf20Sopenharmony_ci #address-cells = <2>; 1168c2ecf20Sopenharmony_ci #size-cells = <2>; 1178c2ecf20Sopenharmony_ci ranges; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci dsp_common_memory: dsp-common-memory@81f800000 { 1208c2ecf20Sopenharmony_ci compatible = "shared-dma-pool"; 1218c2ecf20Sopenharmony_ci reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 1228c2ecf20Sopenharmony_ci reusable; 1238c2ecf20Sopenharmony_ci }; 1248c2ecf20Sopenharmony_ci }; 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci /* 66AK2H/K DSP node */ 1278c2ecf20Sopenharmony_ci soc { 1288c2ecf20Sopenharmony_ci dsp0: dsp@10800000 { 1298c2ecf20Sopenharmony_ci compatible = "ti,k2hk-dsp"; 1308c2ecf20Sopenharmony_ci reg = <0x10800000 0x00100000>, 1318c2ecf20Sopenharmony_ci <0x10e00000 0x00008000>, 1328c2ecf20Sopenharmony_ci <0x10f00000 0x00008000>; 1338c2ecf20Sopenharmony_ci reg-names = "l2sram", "l1pram", "l1dram"; 1348c2ecf20Sopenharmony_ci clocks = <&clkgem0>; 1358c2ecf20Sopenharmony_ci ti,syscon-dev = <&devctrl 0x40>; 1368c2ecf20Sopenharmony_ci resets = <&pscrst 0>; 1378c2ecf20Sopenharmony_ci interrupt-parent = <&kirq0>; 1388c2ecf20Sopenharmony_ci interrupts = <0 8>; 1398c2ecf20Sopenharmony_ci interrupt-names = "vring", "exception"; 1408c2ecf20Sopenharmony_ci kick-gpios = <&dspgpio0 27 0>; 1418c2ecf20Sopenharmony_ci memory-region = <&dsp_common_memory>; 1428c2ecf20Sopenharmony_ci }; 1438c2ecf20Sopenharmony_ci 1448c2ecf20Sopenharmony_ci }; 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci2. 1478c2ecf20Sopenharmony_ci /* 66AK2G DSP alias */ 1488c2ecf20Sopenharmony_ci aliases { 1498c2ecf20Sopenharmony_ci rproc0 = &dsp0; 1508c2ecf20Sopenharmony_ci }; 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ci /* 66AK2G DSP memory node */ 1538c2ecf20Sopenharmony_ci reserved-memory { 1548c2ecf20Sopenharmony_ci #address-cells = <2>; 1558c2ecf20Sopenharmony_ci #size-cells = <2>; 1568c2ecf20Sopenharmony_ci ranges; 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ci dsp_common_memory: dsp-common-memory@81f800000 { 1598c2ecf20Sopenharmony_ci compatible = "shared-dma-pool"; 1608c2ecf20Sopenharmony_ci reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 1618c2ecf20Sopenharmony_ci reusable; 1628c2ecf20Sopenharmony_ci }; 1638c2ecf20Sopenharmony_ci }; 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci /* 66AK2G DSP node */ 1668c2ecf20Sopenharmony_ci soc { 1678c2ecf20Sopenharmony_ci dsp0: dsp@10800000 { 1688c2ecf20Sopenharmony_ci compatible = "ti,k2g-dsp"; 1698c2ecf20Sopenharmony_ci reg = <0x10800000 0x00100000>, 1708c2ecf20Sopenharmony_ci <0x10e00000 0x00008000>, 1718c2ecf20Sopenharmony_ci <0x10f00000 0x00008000>; 1728c2ecf20Sopenharmony_ci reg-names = "l2sram", "l1pram", "l1dram"; 1738c2ecf20Sopenharmony_ci power-domains = <&k2g_pds 0x0046>; 1748c2ecf20Sopenharmony_ci ti,syscon-dev = <&devctrl 0x40>; 1758c2ecf20Sopenharmony_ci resets = <&k2g_reset 0x0046 0x1>; 1768c2ecf20Sopenharmony_ci interrupt-parent = <&kirq0>; 1778c2ecf20Sopenharmony_ci interrupts = <0 8>; 1788c2ecf20Sopenharmony_ci interrupt-names = "vring", "exception"; 1798c2ecf20Sopenharmony_ci kick-gpios = <&dspgpio0 27 0>; 1808c2ecf20Sopenharmony_ci memory-region = <&dsp_common_memory>; 1818c2ecf20Sopenharmony_ci }; 1828c2ecf20Sopenharmony_ci }; 183