18c2ecf20Sopenharmony_ciSTMicroelectronics Co-Processor Bindings
28c2ecf20Sopenharmony_ci----------------------------------------
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ciThis binding provides support for adjunct processors found on ST SoCs.
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ciCo-processors can be controlled from the bootloader or the primary OS. If
78c2ecf20Sopenharmony_cithe bootloader starts a co-processor, the primary OS must detect its state
88c2ecf20Sopenharmony_ciand act accordingly.
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ciRequired properties:
118c2ecf20Sopenharmony_ci- compatible		Should be one of:
128c2ecf20Sopenharmony_ci				"st,st231-rproc"
138c2ecf20Sopenharmony_ci				"st,st40-rproc"
148c2ecf20Sopenharmony_ci- memory-region		Reserved memory (See: ../reserved-memory/reserved-memory.txt)
158c2ecf20Sopenharmony_ci- resets		Reset lines (See: ../reset/reset.txt)
168c2ecf20Sopenharmony_ci- reset-names		Must be "sw_reset" and "pwr_reset"
178c2ecf20Sopenharmony_ci- clocks		Clock for co-processor (See: ../clock/clock-bindings.txt)
188c2ecf20Sopenharmony_ci- clock-frequency	Clock frequency to set co-processor at if the bootloader
198c2ecf20Sopenharmony_ci			hasn't already done so
208c2ecf20Sopenharmony_ci- st,syscfg		System configuration register which holds the boot vector
218c2ecf20Sopenharmony_ci			for the co-processor
228c2ecf20Sopenharmony_ci				1st cell: Phandle to syscon block
238c2ecf20Sopenharmony_ci				2nd cell: Boot vector register offset
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ciExample:
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci	audio_reserved: rproc@42000000 {
288c2ecf20Sopenharmony_ci		compatible = "shared-dma-pool";
298c2ecf20Sopenharmony_ci		reg = <0x42000000 0x01000000>;
308c2ecf20Sopenharmony_ci		no-map;
318c2ecf20Sopenharmony_ci	};
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci	st231-audio {
348c2ecf20Sopenharmony_ci		compatible	= "st,st231-rproc";
358c2ecf20Sopenharmony_ci		memory-region	= <&audio_reserved>;
368c2ecf20Sopenharmony_ci		resets		= <&softreset STIH407_ST231_AUD_SOFTRESET>;
378c2ecf20Sopenharmony_ci		reset-names	= "sw_reset";
388c2ecf20Sopenharmony_ci		clocks		= <&clk_s_c0_flexgen CLK_ST231_AUD_0>;
398c2ecf20Sopenharmony_ci		clock-frequency	= <600000000>;
408c2ecf20Sopenharmony_ci		st,syscfg	= <&syscfg_core 0x228>;
418c2ecf20Sopenharmony_ci	};
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