18c2ecf20Sopenharmony_ciAdaptive Body Bias(ABB) SoC internal LDO regulator for Texas Instruments SoCs
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired Properties:
48c2ecf20Sopenharmony_ci- compatible: Should be one of:
58c2ecf20Sopenharmony_ci  - "ti,abb-v1" for older SoCs like OMAP3
68c2ecf20Sopenharmony_ci  - "ti,abb-v2" for newer SoCs like OMAP4, OMAP5
78c2ecf20Sopenharmony_ci  - "ti,abb-v3" for a generic definition where setup and control registers are
88c2ecf20Sopenharmony_ci     provided (example: DRA7)
98c2ecf20Sopenharmony_ci- reg: Address and length of the register set for the device. It contains
108c2ecf20Sopenharmony_ci  the information of registers in the same order as described by reg-names
118c2ecf20Sopenharmony_ci- reg-names: Should contain the reg names
128c2ecf20Sopenharmony_ci  - "base-address"	- contains base address of ABB module (ti,abb-v1,ti,abb-v2)
138c2ecf20Sopenharmony_ci  - "control-address"	- contains control register address of ABB module (ti,abb-v3)
148c2ecf20Sopenharmony_ci  - "setup-address"	- contains setup register address of ABB module (ti,abb-v3)
158c2ecf20Sopenharmony_ci  - "int-address"	- contains address of interrupt register for ABB module
168c2ecf20Sopenharmony_ci  (also see Optional properties)
178c2ecf20Sopenharmony_ci- #address-cells: should be 0
188c2ecf20Sopenharmony_ci- #size-cells: should be 0
198c2ecf20Sopenharmony_ci- clocks: should point to the clock node used by ABB module
208c2ecf20Sopenharmony_ci- ti,settling-time: Settling time in uSecs from SoC documentation for ABB module
218c2ecf20Sopenharmony_ci	to settle down(target time for SR2_WTCNT_VALUE).
228c2ecf20Sopenharmony_ci- ti,clock-cycles: SoC specific data about count of system ti,clock-cycles used for
238c2ecf20Sopenharmony_ci	computing settling time from SoC Documentation for ABB module(clock
248c2ecf20Sopenharmony_ci	cycles for SR2_WTCNT_VALUE).
258c2ecf20Sopenharmony_ci- ti,tranxdone-status-mask: Mask to the int-register to write-to-clear mask
268c2ecf20Sopenharmony_ci	indicating LDO tranxdone (operation complete).
278c2ecf20Sopenharmony_ci- ti,abb_info: An array of 6-tuples u32 items providing information about ABB
288c2ecf20Sopenharmony_ci	configuration needed per operational voltage of the device.
298c2ecf20Sopenharmony_ci	Each item consists of the following in the same order:
308c2ecf20Sopenharmony_ci	volt: voltage in uV - Only used to index ABB information.
318c2ecf20Sopenharmony_ci	ABB mode: one of the following:
328c2ecf20Sopenharmony_ci		0-bypass
338c2ecf20Sopenharmony_ci		1-Forward Body Bias(FBB)
348c2ecf20Sopenharmony_ci		3-Reverse Body Bias(RBB)
358c2ecf20Sopenharmony_ci	efuse:	(see Optional properties)
368c2ecf20Sopenharmony_ci	RBB enable efuse Mask:	(See Optional properties)
378c2ecf20Sopenharmony_ci	FBB enable efuse Mask:	(See Optional properties)
388c2ecf20Sopenharmony_ci	Vset value efuse Mask:	(See Optional properties)
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci	NOTE: If more than 1 entry is present, then regulator is setup to change
418c2ecf20Sopenharmony_ci	      voltage, allowing for various modes to be selected indexed off
428c2ecf20Sopenharmony_ci	      the regulator. Further, ABB LDOs are considered always-on by
438c2ecf20Sopenharmony_ci	      default.
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ciOptional Properties:
468c2ecf20Sopenharmony_ci- reg-names: In addition to the required properties, the following are optional
478c2ecf20Sopenharmony_ci  - "efuse-address"	- Contains efuse base address used to pick up ABB info.
488c2ecf20Sopenharmony_ci  - "ldo-address"	- Contains address of ABB LDO override register.
498c2ecf20Sopenharmony_ci	"efuse-address" is required for this.
508c2ecf20Sopenharmony_ci- ti,ldovbb-vset-mask	- Required if ldo-address is set, mask for LDO override
518c2ecf20Sopenharmony_ci	register to provide override vset value.
528c2ecf20Sopenharmony_ci- ti,ldovbb-override-mask - Required if ldo-address is set, mask for LDO
538c2ecf20Sopenharmony_ci	override register to enable override vset value.
548c2ecf20Sopenharmony_ci- ti,abb_opp_sel: Addendum to the description in required properties
558c2ecf20Sopenharmony_ci	efuse: Mandatory if 'efuse-address' register is defined. Provides offset
568c2ecf20Sopenharmony_ci	       from efuse-address to pick up ABB characteristics. Set to 0 if
578c2ecf20Sopenharmony_ci	       'efuse-address' is not defined.
588c2ecf20Sopenharmony_ci	RBB enable efuse Mask:	Optional if 'efuse-address' register is defined.
598c2ecf20Sopenharmony_ci		'ABB mode' is force set to RBB mode if value at "efuse-address"
608c2ecf20Sopenharmony_ci		+ efuse maps to RBB mask. Set to 0 to ignore this.
618c2ecf20Sopenharmony_ci	FBB enable efuse Mask:	Optional if 'efuse-address' register is defined.
628c2ecf20Sopenharmony_ci		'ABB mode' is force set to FBB mode if value at "efuse-address"
638c2ecf20Sopenharmony_ci		+ efuse maps to FBB mask (valid only if RBB mask does not match)
648c2ecf20Sopenharmony_ci		Set to 0 to ignore this.
658c2ecf20Sopenharmony_ci	Vset value efuse Mask:	Mandatory if ldo-address is set. Picks up from
668c2ecf20Sopenharmony_ci		efuse the value to set in 'ti,ldovbb-vset-mask' at ldo-address.
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ciExample #1: Simplest configuration (no efuse data, hard coded ABB table):
698c2ecf20Sopenharmony_ciabb_x: regulator-abb-x {
708c2ecf20Sopenharmony_ci	compatible = "ti,abb-v1";
718c2ecf20Sopenharmony_ci	regulator-name = "abb_x";
728c2ecf20Sopenharmony_ci	#address-cells = <0>;
738c2ecf20Sopenharmony_ci	#size-cells = <0>;
748c2ecf20Sopenharmony_ci	reg = <0x483072f0 0x8>, <0x48306818 0x4>;
758c2ecf20Sopenharmony_ci	reg-names = "base-address", "int-address";
768c2ecf20Sopenharmony_ci	ti,tranxdone-status-mask = <0x4000000>;
778c2ecf20Sopenharmony_ci	clocks = <&sysclk>;
788c2ecf20Sopenharmony_ci	ti,settling-time = <30>;
798c2ecf20Sopenharmony_ci	ti,clock-cycles = <8>;
808c2ecf20Sopenharmony_ci	ti,abb_info = <
818c2ecf20Sopenharmony_ci	/* uV		ABB	efuse	rbb_m	fbb_m	vset_m */
828c2ecf20Sopenharmony_ci	1012500		0	0	0	0	0 /* Bypass */
838c2ecf20Sopenharmony_ci	1200000		3	0	0	0	0 /* RBB mandatory */
848c2ecf20Sopenharmony_ci	1320000		1	0	0	0	0 /* FBB mandatory */
858c2ecf20Sopenharmony_ci	>;
868c2ecf20Sopenharmony_ci};
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ciExample #2: Efuse bits contain ABB mode setting (no LDO override capability)
898c2ecf20Sopenharmony_ciabb_y: regulator-abb-y {
908c2ecf20Sopenharmony_ci	compatible = "ti,abb-v2";
918c2ecf20Sopenharmony_ci	regulator-name = "abb_y";
928c2ecf20Sopenharmony_ci	#address-cells = <0>;
938c2ecf20Sopenharmony_ci	#size-cells = <0>;
948c2ecf20Sopenharmony_ci	reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>, <0x4A002268 0x8>;
958c2ecf20Sopenharmony_ci	reg-names = "base-address", "int-address", "efuse-address";
968c2ecf20Sopenharmony_ci	ti,tranxdone-status-mask = <0x4000000>;
978c2ecf20Sopenharmony_ci	clocks = <&sysclk>;
988c2ecf20Sopenharmony_ci	ti,settling-time = <50>;
998c2ecf20Sopenharmony_ci	ti,clock-cycles = <16>;
1008c2ecf20Sopenharmony_ci	ti,abb_info = <
1018c2ecf20Sopenharmony_ci	/* uV		ABB	efuse	rbb_m	fbb_m	vset_m */
1028c2ecf20Sopenharmony_ci	975000		0	0	0	0	0 /* Bypass */
1038c2ecf20Sopenharmony_ci	1012500		0	0	0x40000	0	0 /* RBB optional */
1048c2ecf20Sopenharmony_ci	1200000		0	0x4	0	0x40000	0 /* FBB optional */
1058c2ecf20Sopenharmony_ci	1320000		1	0	0	0	0 /* FBB mandatory */
1068c2ecf20Sopenharmony_ci	>;
1078c2ecf20Sopenharmony_ci};
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ciExample #3: Efuse bits contain ABB mode setting and LDO override capability
1108c2ecf20Sopenharmony_ciabb_z: regulator-abb-z {
1118c2ecf20Sopenharmony_ci	compatible = "ti,abb-v2";
1128c2ecf20Sopenharmony_ci	regulator-name = "abb_z";
1138c2ecf20Sopenharmony_ci	#address-cells = <0>;
1148c2ecf20Sopenharmony_ci	#size-cells = <0>;
1158c2ecf20Sopenharmony_ci	reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,
1168c2ecf20Sopenharmony_ci	      <0x4a002194 0x8>, <0x4ae0C314 0x4>;
1178c2ecf20Sopenharmony_ci	reg-names = "base-address", "int-address",
1188c2ecf20Sopenharmony_ci		    "efuse-address", "ldo-address";
1198c2ecf20Sopenharmony_ci	ti,tranxdone-status-mask = <0x8000000>;
1208c2ecf20Sopenharmony_ci	/* LDOVBBMM_MUX_CTRL */
1218c2ecf20Sopenharmony_ci	ti,ldovbb-override-mask = <0x400>;
1228c2ecf20Sopenharmony_ci	/* LDOVBBMM_VSET_OUT */
1238c2ecf20Sopenharmony_ci	ti,ldovbb-vset-mask = <0x1F>;
1248c2ecf20Sopenharmony_ci	clocks = <&sysclk>;
1258c2ecf20Sopenharmony_ci	ti,settling-time = <50>;
1268c2ecf20Sopenharmony_ci	ti,clock-cycles = <16>;
1278c2ecf20Sopenharmony_ci	ti,abb_info = <
1288c2ecf20Sopenharmony_ci	/* uV	ABB	efuse	rbb_m	fbb_m	vset_m */
1298c2ecf20Sopenharmony_ci	975000	0	0	0	0	0	/* Bypass */
1308c2ecf20Sopenharmony_ci	1200000	0	0x4	0	0x40000	0x1f00	/* FBB optional, vset */
1318c2ecf20Sopenharmony_ci	>;
1328c2ecf20Sopenharmony_ci};
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