18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Samsung SoC PWM timers 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Thierry Reding <thierry.reding@gmail.com> 118c2ecf20Sopenharmony_ci - Krzysztof Kozlowski <krzk@kernel.org> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cidescription: |+ 148c2ecf20Sopenharmony_ci Samsung SoCs contain PWM timer blocks which can be used for system clock source 158c2ecf20Sopenharmony_ci and clock event timers, as well as to drive SoC outputs with PWM signal. Each 168c2ecf20Sopenharmony_ci PWM timer block provides 5 PWM channels (not all of them can drive physical 178c2ecf20Sopenharmony_ci outputs - see SoC and board manual). 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci Be aware that the clocksource driver supports only uniprocessor systems. 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciproperties: 228c2ecf20Sopenharmony_ci compatible: 238c2ecf20Sopenharmony_ci enum: 248c2ecf20Sopenharmony_ci - samsung,s3c2410-pwm # 16-bit, S3C24xx 258c2ecf20Sopenharmony_ci - samsung,s3c6400-pwm # 32-bit, S3C64xx 268c2ecf20Sopenharmony_ci - samsung,s5p6440-pwm # 32-bit, S5P64x0 278c2ecf20Sopenharmony_ci - samsung,s5pc100-pwm # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs 288c2ecf20Sopenharmony_ci - samsung,exynos4210-pwm # 32-bit, Exynos 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci reg: 318c2ecf20Sopenharmony_ci maxItems: 1 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci clocks: 348c2ecf20Sopenharmony_ci minItems: 1 358c2ecf20Sopenharmony_ci maxItems: 3 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci clock-names: 388c2ecf20Sopenharmony_ci description: | 398c2ecf20Sopenharmony_ci Should contain all following required clock names: 408c2ecf20Sopenharmony_ci - "timers" - PWM base clock used to generate PWM signals, 418c2ecf20Sopenharmony_ci and any subset of following optional clock names: 428c2ecf20Sopenharmony_ci - "pwm-tclk0" - first external PWM clock source, 438c2ecf20Sopenharmony_ci - "pwm-tclk1" - second external PWM clock source. 448c2ecf20Sopenharmony_ci Note that not all IP variants allow using all external clock sources. 458c2ecf20Sopenharmony_ci Refer to SoC documentation to learn which clock source configurations 468c2ecf20Sopenharmony_ci are available. 478c2ecf20Sopenharmony_ci oneOf: 488c2ecf20Sopenharmony_ci - items: 498c2ecf20Sopenharmony_ci - const: timers 508c2ecf20Sopenharmony_ci - items: 518c2ecf20Sopenharmony_ci - const: timers 528c2ecf20Sopenharmony_ci - const: pwm-tclk0 538c2ecf20Sopenharmony_ci - items: 548c2ecf20Sopenharmony_ci - const: timers 558c2ecf20Sopenharmony_ci - const: pwm-tclk1 568c2ecf20Sopenharmony_ci - items: 578c2ecf20Sopenharmony_ci - const: timers 588c2ecf20Sopenharmony_ci - const: pwm-tclk0 598c2ecf20Sopenharmony_ci - const: pwm-tclk1 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci interrupts: 628c2ecf20Sopenharmony_ci description: 638c2ecf20Sopenharmony_ci One interrupt per timer, starting at timer 0. Necessary only for SoCs which 648c2ecf20Sopenharmony_ci use PWM clocksource. 658c2ecf20Sopenharmony_ci minItems: 1 668c2ecf20Sopenharmony_ci maxItems: 5 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci "#pwm-cells": 698c2ecf20Sopenharmony_ci description: 708c2ecf20Sopenharmony_ci The only third cell flag supported by this binding 718c2ecf20Sopenharmony_ci is PWM_POLARITY_INVERTED. 728c2ecf20Sopenharmony_ci const: 3 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci samsung,pwm-outputs: 758c2ecf20Sopenharmony_ci description: 768c2ecf20Sopenharmony_ci A list of PWM channels used as PWM outputs on particular platform. 778c2ecf20Sopenharmony_ci It is an array of up to 5 elements being indices of PWM channels 788c2ecf20Sopenharmony_ci (from 0 to 4), the order does not matter. 798c2ecf20Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32-array 808c2ecf20Sopenharmony_ci uniqueItems: true 818c2ecf20Sopenharmony_ci items: 828c2ecf20Sopenharmony_ci minimum: 0 838c2ecf20Sopenharmony_ci maximum: 4 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_cirequired: 868c2ecf20Sopenharmony_ci - clocks 878c2ecf20Sopenharmony_ci - clock-names 888c2ecf20Sopenharmony_ci - compatible 898c2ecf20Sopenharmony_ci - "#pwm-cells" 908c2ecf20Sopenharmony_ci - reg 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ciadditionalProperties: false 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ciallOf: 958c2ecf20Sopenharmony_ci - $ref: pwm.yaml# 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci - if: 988c2ecf20Sopenharmony_ci properties: 998c2ecf20Sopenharmony_ci compatible: 1008c2ecf20Sopenharmony_ci contains: 1018c2ecf20Sopenharmony_ci enum: 1028c2ecf20Sopenharmony_ci - samsung,s3c2410-pwm 1038c2ecf20Sopenharmony_ci - samsung,s3c6400-pwm 1048c2ecf20Sopenharmony_ci - samsung,s5p6440-pwm 1058c2ecf20Sopenharmony_ci - samsung,s5pc100-pwm 1068c2ecf20Sopenharmony_ci then: 1078c2ecf20Sopenharmony_ci required: 1088c2ecf20Sopenharmony_ci - interrupts 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ciexamples: 1118c2ecf20Sopenharmony_ci - | 1128c2ecf20Sopenharmony_ci pwm@7f006000 { 1138c2ecf20Sopenharmony_ci compatible = "samsung,s3c6400-pwm"; 1148c2ecf20Sopenharmony_ci reg = <0x7f006000 0x1000>; 1158c2ecf20Sopenharmony_ci interrupt-parent = <&vic0>; 1168c2ecf20Sopenharmony_ci interrupts = <23>, <24>, <25>, <27>, <28>; 1178c2ecf20Sopenharmony_ci clocks = <&clock 67>; 1188c2ecf20Sopenharmony_ci clock-names = "timers"; 1198c2ecf20Sopenharmony_ci samsung,pwm-outputs = <0>, <1>; 1208c2ecf20Sopenharmony_ci #pwm-cells = <3>; 1218c2ecf20Sopenharmony_ci }; 122