18c2ecf20Sopenharmony_ciRockchip PWM controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci - compatible: should be "rockchip,<name>-pwm"
58c2ecf20Sopenharmony_ci   "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
68c2ecf20Sopenharmony_ci   "rockchip,rk3288-pwm": found on RK3288 SOC
78c2ecf20Sopenharmony_ci   "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
88c2ecf20Sopenharmony_ci   "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
98c2ecf20Sopenharmony_ci - reg: physical base address and length of the controller's registers
108c2ecf20Sopenharmony_ci - clocks: See ../clock/clock-bindings.txt
118c2ecf20Sopenharmony_ci   - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
128c2ecf20Sopenharmony_ci     - There is one clock that's used both to derive the functional clock
138c2ecf20Sopenharmony_ci       for the device and as the bus clock.
148c2ecf20Sopenharmony_ci   - For newer hardware (rk3328 and future socs): specified by name
158c2ecf20Sopenharmony_ci     - "pwm": This is used to derive the functional clock.
168c2ecf20Sopenharmony_ci     - "pclk": This is the APB bus clock.
178c2ecf20Sopenharmony_ci - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
188c2ecf20Sopenharmony_ci   for a description of the cell format.
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ciExample:
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci	pwm0: pwm@20030000 {
238c2ecf20Sopenharmony_ci		compatible = "rockchip,rk2928-pwm";
248c2ecf20Sopenharmony_ci		reg = <0x20030000 0x10>;
258c2ecf20Sopenharmony_ci		clocks = <&cru PCLK_PWM01>;
268c2ecf20Sopenharmony_ci		#pwm-cells = <2>;
278c2ecf20Sopenharmony_ci	};
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