18c2ecf20Sopenharmony_ciHisilicon PWM controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci-compatible: should contain one SoC specific compatible string
58c2ecf20Sopenharmony_ci The SoC specific strings supported including:
68c2ecf20Sopenharmony_ci	"hisilicon,hi3516cv300-pwm"
78c2ecf20Sopenharmony_ci	"hisilicon,hi3519v100-pwm"
88c2ecf20Sopenharmony_ci	"hisilicon,hi3559v100-shub-pwm"
98c2ecf20Sopenharmony_ci	"hisilicon,hi3559v100-pwm
108c2ecf20Sopenharmony_ci- reg: physical base address and length of the controller's registers.
118c2ecf20Sopenharmony_ci- clocks: phandle and clock specifier of the PWM reference clock.
128c2ecf20Sopenharmony_ci- resets: phandle and reset specifier for the PWM controller reset.
138c2ecf20Sopenharmony_ci- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
148c2ecf20Sopenharmony_ci  the cells format.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciExample:
178c2ecf20Sopenharmony_ci	pwm: pwm@12130000 {
188c2ecf20Sopenharmony_ci		compatible = "hisilicon,hi3516cv300-pwm";
198c2ecf20Sopenharmony_ci		reg = <0x12130000 0x10000>;
208c2ecf20Sopenharmony_ci		clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
218c2ecf20Sopenharmony_ci		resets = <&crg_ctrl 0x38 0>;
228c2ecf20Sopenharmony_ci		#pwm-cells = <3>;
238c2ecf20Sopenharmony_ci	};
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