18c2ecf20Sopenharmony_ciFreescale FlexTimer Module (FTM) PWM controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe same FTM PWM device can have a different endianness on different SoCs. The 48c2ecf20Sopenharmony_cidevice tree provides a property to describing this so that an operating system 58c2ecf20Sopenharmony_cidevice driver can handle all variants of the device. Refer to the table below 68c2ecf20Sopenharmony_cifor the endianness of the FTM PWM block as integrated into the existing SoCs: 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci SoC | FTM-PWM endianness 98c2ecf20Sopenharmony_ci --------+------------------- 108c2ecf20Sopenharmony_ci Vybrid | LE 118c2ecf20Sopenharmony_ci LS1 | BE 128c2ecf20Sopenharmony_ci LS2 | LE 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciPlease see ../regmap/regmap.txt for more detail about how to specify endian 158c2ecf20Sopenharmony_cimodes in device tree. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciRequired properties: 198c2ecf20Sopenharmony_ci- compatible : should be "fsl,<soc>-ftm-pwm" and one of the following 208c2ecf20Sopenharmony_ci compatible strings: 218c2ecf20Sopenharmony_ci - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610 228c2ecf20Sopenharmony_ci - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM 238c2ecf20Sopenharmony_ci- reg: Physical base address and length of the controller's registers 248c2ecf20Sopenharmony_ci- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 258c2ecf20Sopenharmony_ci the cells format. 268c2ecf20Sopenharmony_ci- clock-names: Should include the following module clock source entries: 278c2ecf20Sopenharmony_ci "ftm_sys" (module clock, also can be used as counter clock), 288c2ecf20Sopenharmony_ci "ftm_ext" (external counter clock), 298c2ecf20Sopenharmony_ci "ftm_fix" (fixed counter clock), 308c2ecf20Sopenharmony_ci "ftm_cnt_clk_en" (external and fixed counter clock enable/disable). 318c2ecf20Sopenharmony_ci- clocks: Must contain a phandle and clock specifier for each entry in 328c2ecf20Sopenharmony_ci clock-names, please see clock/clock-bindings.txt for details of the property 338c2ecf20Sopenharmony_ci values. 348c2ecf20Sopenharmony_ci- pinctrl-names: Must contain a "default" entry. 358c2ecf20Sopenharmony_ci- pinctrl-NNN: One property must exist for each entry in pinctrl-names. 368c2ecf20Sopenharmony_ci See pinctrl/pinctrl-bindings.txt for details of the property values. 378c2ecf20Sopenharmony_ci- big-endian: Boolean property, required if the FTM PWM registers use a big- 388c2ecf20Sopenharmony_ci endian rather than little-endian layout. 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ciExample: 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_cipwm0: pwm@40038000 { 438c2ecf20Sopenharmony_ci compatible = "fsl,vf610-ftm-pwm"; 448c2ecf20Sopenharmony_ci reg = <0x40038000 0x1000>; 458c2ecf20Sopenharmony_ci #pwm-cells = <3>; 468c2ecf20Sopenharmony_ci clock-names = "ftm_sys", "ftm_ext", 478c2ecf20Sopenharmony_ci "ftm_fix", "ftm_cnt_clk_en"; 488c2ecf20Sopenharmony_ci clocks = <&clks VF610_CLK_FTM0>, 498c2ecf20Sopenharmony_ci <&clks VF610_CLK_FTM0_EXT_SEL>, 508c2ecf20Sopenharmony_ci <&clks VF610_CLK_FTM0_FIX_SEL>, 518c2ecf20Sopenharmony_ci <&clks VF610_CLK_FTM0_EXT_FIX_EN>; 528c2ecf20Sopenharmony_ci pinctrl-names = "default"; 538c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_pwm0_1>; 548c2ecf20Sopenharmony_ci big-endian; 558c2ecf20Sopenharmony_ci}; 56