18c2ecf20Sopenharmony_ciDevice-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe Atmel HLCDC PWM is subdevice of the HLCDC MFD device. 48c2ecf20Sopenharmony_ciSee ../mfd/atmel-hlcdc.txt for more details. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci - compatible: value should be one of the following: 88c2ecf20Sopenharmony_ci "atmel,hlcdc-pwm" 98c2ecf20Sopenharmony_ci - pinctr-names: the pin control state names. Should contain "default". 108c2ecf20Sopenharmony_ci - pinctrl-0: should contain the pinctrl states described by pinctrl 118c2ecf20Sopenharmony_ci default. 128c2ecf20Sopenharmony_ci - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells 138c2ecf20Sopenharmony_ci bindings defined in pwm.yaml in this directory. 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciExample: 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci hlcdc: hlcdc@f0030000 { 188c2ecf20Sopenharmony_ci compatible = "atmel,sama5d3-hlcdc"; 198c2ecf20Sopenharmony_ci reg = <0xf0030000 0x2000>; 208c2ecf20Sopenharmony_ci clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; 218c2ecf20Sopenharmony_ci clock-names = "periph_clk","sys_clk", "slow_clk"; 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci hlcdc_pwm: hlcdc-pwm { 248c2ecf20Sopenharmony_ci compatible = "atmel,hlcdc-pwm"; 258c2ecf20Sopenharmony_ci pinctrl-names = "default"; 268c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_lcd_pwm>; 278c2ecf20Sopenharmony_ci #pwm-cells = <3>; 288c2ecf20Sopenharmony_ci }; 298c2ecf20Sopenharmony_ci }; 30