18c2ecf20Sopenharmony_ciMPC5121 PSC Device Tree Bindings 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciPSC in UART mode 48c2ecf20Sopenharmony_ci---------------- 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciFor PSC in UART mode the needed PSC serial devices 78c2ecf20Sopenharmony_ciare specified by fsl,mpc5121-psc-uart nodes in the 88c2ecf20Sopenharmony_cifsl,mpc5121-immr SoC node. Additionally the PSC FIFO 98c2ecf20Sopenharmony_ciController node fsl,mpc5121-psc-fifo is required there: 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_cifsl,mpc512x-psc-uart nodes 128c2ecf20Sopenharmony_ci-------------------------- 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciRequired properties : 158c2ecf20Sopenharmony_ci - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc" 168c2ecf20Sopenharmony_ci Supported <soc>s: mpc5121, mpc5125 178c2ecf20Sopenharmony_ci - reg : Offset and length of the register set for the PSC device 188c2ecf20Sopenharmony_ci - interrupts : <a b> where a is the interrupt number of the 198c2ecf20Sopenharmony_ci PSC FIFO Controller and b is a field that represents an 208c2ecf20Sopenharmony_ci encoding of the sense and level information for the interrupt. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciRecommended properties : 238c2ecf20Sopenharmony_ci - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4) 248c2ecf20Sopenharmony_ci - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4) 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciPSC in SPI mode 278c2ecf20Sopenharmony_ci--------------- 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ciSimilar to the UART mode a PSC can be operated in SPI mode. The compatible used 308c2ecf20Sopenharmony_cifor that is fsl,mpc5121-psc-spi. It requires a fsl,mpc5121-psc-fifo as well. 318c2ecf20Sopenharmony_ciThe required and recommended properties are identical to the 328c2ecf20Sopenharmony_cifsl,mpc5121-psc-uart nodes, just use spi instead of uart in the compatible 338c2ecf20Sopenharmony_cistring. 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_cifsl,mpc512x-psc-fifo node 368c2ecf20Sopenharmony_ci------------------------- 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ciRequired properties : 398c2ecf20Sopenharmony_ci - compatible : Should be "fsl,<soc>-psc-fifo" 408c2ecf20Sopenharmony_ci Supported <soc>s: mpc5121, mpc5125 418c2ecf20Sopenharmony_ci - reg : Offset and length of the register set for the PSC 428c2ecf20Sopenharmony_ci FIFO Controller 438c2ecf20Sopenharmony_ci - interrupts : <a b> where a is the interrupt number of the 448c2ecf20Sopenharmony_ci PSC FIFO Controller and b is a field that represents an 458c2ecf20Sopenharmony_ci encoding of the sense and level information for the interrupt. 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ciRecommended properties : 488c2ecf20Sopenharmony_ci - clocks : specifies the clock needed to operate the fifo controller 498c2ecf20Sopenharmony_ci - clock-names : name(s) for the clock(s) listed in clocks 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ciExample for a board using PSC0 and PSC1 devices in serial mode: 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ciserial@11000 { 548c2ecf20Sopenharmony_ci compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 558c2ecf20Sopenharmony_ci cell-index = <0>; 568c2ecf20Sopenharmony_ci reg = <0x11000 0x100>; 578c2ecf20Sopenharmony_ci interrupts = <40 0x8>; 588c2ecf20Sopenharmony_ci interrupt-parent = < &ipic >; 598c2ecf20Sopenharmony_ci fsl,rx-fifo-size = <16>; 608c2ecf20Sopenharmony_ci fsl,tx-fifo-size = <16>; 618c2ecf20Sopenharmony_ci}; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ciserial@11100 { 648c2ecf20Sopenharmony_ci compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 658c2ecf20Sopenharmony_ci cell-index = <1>; 668c2ecf20Sopenharmony_ci reg = <0x11100 0x100>; 678c2ecf20Sopenharmony_ci interrupts = <40 0x8>; 688c2ecf20Sopenharmony_ci interrupt-parent = < &ipic >; 698c2ecf20Sopenharmony_ci fsl,rx-fifo-size = <16>; 708c2ecf20Sopenharmony_ci fsl,tx-fifo-size = <16>; 718c2ecf20Sopenharmony_ci}; 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_cipscfifo@11f00 { 748c2ecf20Sopenharmony_ci compatible = "fsl,mpc5121-psc-fifo"; 758c2ecf20Sopenharmony_ci reg = <0x11f00 0x100>; 768c2ecf20Sopenharmony_ci interrupts = <40 0x8>; 778c2ecf20Sopenharmony_ci interrupt-parent = < &ipic >; 788c2ecf20Sopenharmony_ci}; 79