18c2ecf20Sopenharmony_ci* Device tree bindings for Texas Instruments keystone reset 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThis node is intended to allow SoC reset in case of software reset 48c2ecf20Sopenharmony_ciof selected watchdogs. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciThe Keystone SoCs can contain up to 4 watchdog timers to reset 78c2ecf20Sopenharmony_ciSoC. Each watchdog timer event input is connected to the Reset Mux 88c2ecf20Sopenharmony_ciblock. The Reset Mux block can be configured to cause reset or not. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciAdditionally soft or hard reset can be configured. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciRequired properties: 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci- compatible: ti,keystone-reset 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci- ti,syscon-pll: phandle/offset pair. The phandle to syscon used to 178c2ecf20Sopenharmony_ci access pll controller registers and the offset to use 188c2ecf20Sopenharmony_ci reset control registers. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci- ti,syscon-dev: phandle/offset pair. The phandle to syscon used to 218c2ecf20Sopenharmony_ci access device state control registers and the offset 228c2ecf20Sopenharmony_ci in order to use mux block registers for all watchdogs. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciOptional properties: 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci- ti,soft-reset: Boolean option indicating soft reset. 278c2ecf20Sopenharmony_ci By default hard reset is used. 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci- ti,wdt-list: WDT list that can cause SoC reset. It's not related 308c2ecf20Sopenharmony_ci to WDT driver, it's just needed to enable a SoC related 318c2ecf20Sopenharmony_ci reset that's triggered by one of WDTs. The list is 328c2ecf20Sopenharmony_ci in format: <0>, <2>; It can be in random order and 338c2ecf20Sopenharmony_ci begins from 0 to 3, as keystone can contain up to 4 SoC 348c2ecf20Sopenharmony_ci reset watchdogs and can be in random order. 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ciExample 1: 378c2ecf20Sopenharmony_ciSetup keystone reset so that in case software reset or 388c2ecf20Sopenharmony_ciWDT0 is triggered it issues hard reset for SoC. 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_cipllctrl: pll-controller@2310000 { 418c2ecf20Sopenharmony_ci compatible = "ti,keystone-pllctrl", "syscon"; 428c2ecf20Sopenharmony_ci reg = <0x02310000 0x200>; 438c2ecf20Sopenharmony_ci}; 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_cidevctrl: device-state-control@2620000 { 468c2ecf20Sopenharmony_ci compatible = "ti,keystone-devctrl", "syscon"; 478c2ecf20Sopenharmony_ci reg = <0x02620000 0x1000>; 488c2ecf20Sopenharmony_ci}; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_cirstctrl: reset-controller { 518c2ecf20Sopenharmony_ci compatible = "ti,keystone-reset"; 528c2ecf20Sopenharmony_ci ti,syscon-pll = <&pllctrl 0xe4>; 538c2ecf20Sopenharmony_ci ti,syscon-dev = <&devctrl 0x328>; 548c2ecf20Sopenharmony_ci ti,wdt-list = <0>; 558c2ecf20Sopenharmony_ci}; 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ciExample 2: 588c2ecf20Sopenharmony_ciSetup keystone reset so that in case of software reset or 598c2ecf20Sopenharmony_ciWDT0 or WDT2 is triggered it issues soft reset for SoC. 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_cirstctrl: reset-controller { 628c2ecf20Sopenharmony_ci compatible = "ti,keystone-reset"; 638c2ecf20Sopenharmony_ci ti,syscon-pll = <&pllctrl 0xe4>; 648c2ecf20Sopenharmony_ci ti,syscon-dev = <&devctrl 0x328>; 658c2ecf20Sopenharmony_ci ti,wdt-list = <0>, <2>; 668c2ecf20Sopenharmony_ci ti,soft-reset; 678c2ecf20Sopenharmony_ci}; 68