18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Renesas RZ/N1 Pin Controller
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Gareth Williams <gareth.williams.jx@renesas.com>
118c2ecf20Sopenharmony_ci  - Geert Uytterhoeven <geert+renesas@glider.be>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciproperties:
148c2ecf20Sopenharmony_ci  compatible:
158c2ecf20Sopenharmony_ci    items:
168c2ecf20Sopenharmony_ci      - enum:
178c2ecf20Sopenharmony_ci          - renesas,r9a06g032-pinctrl # RZ/N1D
188c2ecf20Sopenharmony_ci          - renesas,r9a06g033-pinctrl # RZ/N1S
198c2ecf20Sopenharmony_ci      - const: renesas,rzn1-pinctrl   # Generic RZ/N1
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci  reg:
228c2ecf20Sopenharmony_ci    items:
238c2ecf20Sopenharmony_ci      - description: GPIO Multiplexing Level1 Register Block
248c2ecf20Sopenharmony_ci      - description: GPIO Multiplexing Level2 Register Block
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci  clocks:
278c2ecf20Sopenharmony_ci    maxItems: 1
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci  clock-names:
308c2ecf20Sopenharmony_ci    const: bus
318c2ecf20Sopenharmony_ci    description:
328c2ecf20Sopenharmony_ci      The bus clock, sometimes described as pclk, for register accesses.
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_cirequired:
358c2ecf20Sopenharmony_ci  - compatible
368c2ecf20Sopenharmony_ci  - reg
378c2ecf20Sopenharmony_ci  - clocks
388c2ecf20Sopenharmony_ci  - clock-names
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ciadditionalProperties:
418c2ecf20Sopenharmony_ci  anyOf:
428c2ecf20Sopenharmony_ci    - type: object
438c2ecf20Sopenharmony_ci      allOf:
448c2ecf20Sopenharmony_ci        - $ref: pincfg-node.yaml#
458c2ecf20Sopenharmony_ci        - $ref: pinmux-node.yaml#
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci      description:
488c2ecf20Sopenharmony_ci        A pin multiplexing sub-node describes how to configure a set of (or a
498c2ecf20Sopenharmony_ci        single) pin in some desired alternate function mode.
508c2ecf20Sopenharmony_ci        A single sub-node may define several pin configurations.
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci      properties:
538c2ecf20Sopenharmony_ci        pinmux:
548c2ecf20Sopenharmony_ci          description: |
558c2ecf20Sopenharmony_ci            Integer array representing pin number and pin multiplexing
568c2ecf20Sopenharmony_ci            configuration.
578c2ecf20Sopenharmony_ci            When a pin has to be configured in alternate function mode, use
588c2ecf20Sopenharmony_ci            this property to identify the pin by its global index, and provide
598c2ecf20Sopenharmony_ci            its alternate function configuration number along with it.
608c2ecf20Sopenharmony_ci            When multiple pins are required to be configured as part of the
618c2ecf20Sopenharmony_ci            same alternate function they shall be specified as members of the
628c2ecf20Sopenharmony_ci            same argument list of a single "pinmux" property.
638c2ecf20Sopenharmony_ci            Integers values in the "pinmux" argument list are assembled as:
648c2ecf20Sopenharmony_ci            (PIN | MUX_FUNC << 8)
658c2ecf20Sopenharmony_ci            where PIN directly corresponds to the pl_gpio pin number and
668c2ecf20Sopenharmony_ci            MUX_FUNC is one of the alternate function identifiers defined in:
678c2ecf20Sopenharmony_ci            <include/dt-bindings/pinctrl/rzn1-pinctrl.h>
688c2ecf20Sopenharmony_ci            These identifiers collapse the IO Multiplex Configuration Level 1
698c2ecf20Sopenharmony_ci            and Level 2 numbers that are detailed in the hardware reference
708c2ecf20Sopenharmony_ci            manual into a single number. The identifiers for Level 2 are simply
718c2ecf20Sopenharmony_ci            offset by 10.  Additional identifiers are provided to specify the
728c2ecf20Sopenharmony_ci            MDIO source peripheral.
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci        phandle: true
758c2ecf20Sopenharmony_ci        bias-disable: true
768c2ecf20Sopenharmony_ci        bias-pull-up:
778c2ecf20Sopenharmony_ci          description: Pull up the pin with 50 kOhm
788c2ecf20Sopenharmony_ci        bias-pull-down:
798c2ecf20Sopenharmony_ci          description: Pull down the pin with 50 kOhm
808c2ecf20Sopenharmony_ci        bias-high-impedance: true
818c2ecf20Sopenharmony_ci        drive-strength:
828c2ecf20Sopenharmony_ci          enum: [ 4, 6, 8, 12 ]
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci      required:
858c2ecf20Sopenharmony_ci        - pinmux
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci      additionalProperties:
888c2ecf20Sopenharmony_ci        $ref: "#/additionalProperties/anyOf/0"
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci    - type: object
918c2ecf20Sopenharmony_ci      properties:
928c2ecf20Sopenharmony_ci        phandle: true
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ci      additionalProperties:
958c2ecf20Sopenharmony_ci        $ref: "#/additionalProperties/anyOf/0"
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_ciexamples:
988c2ecf20Sopenharmony_ci  - |
998c2ecf20Sopenharmony_ci    #include <dt-bindings/clock/r9a06g032-sysctrl.h>
1008c2ecf20Sopenharmony_ci    #include <dt-bindings/pinctrl/rzn1-pinctrl.h>
1018c2ecf20Sopenharmony_ci    pinctrl: pinctrl@40067000 {
1028c2ecf20Sopenharmony_ci            compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
1038c2ecf20Sopenharmony_ci            reg = <0x40067000 0x1000>, <0x51000000 0x480>;
1048c2ecf20Sopenharmony_ci            clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>;
1058c2ecf20Sopenharmony_ci            clock-names = "bus";
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_ci            /*
1088c2ecf20Sopenharmony_ci             * A serial communication interface with a TX output pin and an RX
1098c2ecf20Sopenharmony_ci             * input pin.
1108c2ecf20Sopenharmony_ci             */
1118c2ecf20Sopenharmony_ci            pins_uart0: pins_uart0 {
1128c2ecf20Sopenharmony_ci                    pinmux = <
1138c2ecf20Sopenharmony_ci                            RZN1_PINMUX(103, RZN1_FUNC_UART0_I) /* UART0_TXD */
1148c2ecf20Sopenharmony_ci                            RZN1_PINMUX(104, RZN1_FUNC_UART0_I) /* UART0_RXD */
1158c2ecf20Sopenharmony_ci                    >;
1168c2ecf20Sopenharmony_ci            };
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci            /*
1198c2ecf20Sopenharmony_ci             * Set the pull-up on the RXD pin of the UART.
1208c2ecf20Sopenharmony_ci             */
1218c2ecf20Sopenharmony_ci            pins_uart0_alt: pins_uart0_alt {
1228c2ecf20Sopenharmony_ci                    pinmux = <RZN1_PINMUX(103, RZN1_FUNC_UART0_I)>;
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci                    pins_uart6_rx {
1258c2ecf20Sopenharmony_ci                            pinmux = <RZN1_PINMUX(104, RZN1_FUNC_UART0_I)>;
1268c2ecf20Sopenharmony_ci                            bias-pull-up;
1278c2ecf20Sopenharmony_ci                    };
1288c2ecf20Sopenharmony_ci            };
1298c2ecf20Sopenharmony_ci    };
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