18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Renesas RZ/A2 combined Pin and GPIO controller
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Chris Brandt <chris.brandt@renesas.com>
118c2ecf20Sopenharmony_ci  - Geert Uytterhoeven <geert+renesas@glider.be>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_cidescription:
148c2ecf20Sopenharmony_ci  The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO
158c2ecf20Sopenharmony_ci  controller.
168c2ecf20Sopenharmony_ci  Pin multiplexing and GPIO configuration is performed on a per-pin basis.
178c2ecf20Sopenharmony_ci  Each port features up to 8 pins, each of them configurable for GPIO function
188c2ecf20Sopenharmony_ci  (port mode) or in alternate function mode.
198c2ecf20Sopenharmony_ci  Up to 8 different alternate function modes exist for each single pin.
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ciproperties:
228c2ecf20Sopenharmony_ci  compatible:
238c2ecf20Sopenharmony_ci    const: "renesas,r7s9210-pinctrl" # RZ/A2M
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci  reg:
268c2ecf20Sopenharmony_ci    maxItems: 1
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci  gpio-controller: true
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci  '#gpio-cells':
318c2ecf20Sopenharmony_ci    const: 2
328c2ecf20Sopenharmony_ci    description:
338c2ecf20Sopenharmony_ci      The first cell contains the global GPIO port index, constructed using the
348c2ecf20Sopenharmony_ci      RZA2_PIN() helper macro in r7s9210-pinctrl.h.
358c2ecf20Sopenharmony_ci      E.g. "RZA2_PIN(PORT6, 0)" for P6_0.
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci  gpio-ranges:
388c2ecf20Sopenharmony_ci    maxItems: 1
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_cipatternProperties:
418c2ecf20Sopenharmony_ci  "^.*$":
428c2ecf20Sopenharmony_ci    if:
438c2ecf20Sopenharmony_ci      type: object
448c2ecf20Sopenharmony_ci    then:
458c2ecf20Sopenharmony_ci      allOf:
468c2ecf20Sopenharmony_ci        - $ref: pincfg-node.yaml#
478c2ecf20Sopenharmony_ci        - $ref: pinmux-node.yaml#
488c2ecf20Sopenharmony_ci      description:
498c2ecf20Sopenharmony_ci        The child nodes of the pin controller designate pins to be used for
508c2ecf20Sopenharmony_ci        specific peripheral functions or as GPIO.
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci        A pin multiplexing sub-node describes how to configure a set of
538c2ecf20Sopenharmony_ci        (or a single) pin in some desired alternate function mode.
548c2ecf20Sopenharmony_ci        The values for the pinmux properties are a combination of port name,
558c2ecf20Sopenharmony_ci        pin number and the desired function index. Use the RZA2_PINMUX macro
568c2ecf20Sopenharmony_ci        located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
578c2ecf20Sopenharmony_ci        define these.
588c2ecf20Sopenharmony_ci        For assigning GPIO pins, use the macro RZA2_PIN also in
598c2ecf20Sopenharmony_ci        to express the desired port pin.
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci      properties:
628c2ecf20Sopenharmony_ci        phandle: true
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci        pinmux:
658c2ecf20Sopenharmony_ci          description:
668c2ecf20Sopenharmony_ci            Values are constructed from GPIO port number, pin number, and
678c2ecf20Sopenharmony_ci            alternate function configuration number using the RZA2_PINMUX()
688c2ecf20Sopenharmony_ci            helper macro in r7s9210-pinctrl.h.
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci      required:
718c2ecf20Sopenharmony_ci        - pinmux
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci      additionalProperties: false
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_cirequired:
768c2ecf20Sopenharmony_ci  - compatible
778c2ecf20Sopenharmony_ci  - reg
788c2ecf20Sopenharmony_ci  - gpio-controller
798c2ecf20Sopenharmony_ci  - '#gpio-cells'
808c2ecf20Sopenharmony_ci  - gpio-ranges
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ciadditionalProperties: false
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ciexamples:
858c2ecf20Sopenharmony_ci  - |
868c2ecf20Sopenharmony_ci    #include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
878c2ecf20Sopenharmony_ci    pinctrl: pinctrl@fcffe000 {
888c2ecf20Sopenharmony_ci            compatible = "renesas,r7s9210-pinctrl";
898c2ecf20Sopenharmony_ci            reg = <0xfcffe000 0x1000>;
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci            gpio-controller;
928c2ecf20Sopenharmony_ci            #gpio-cells = <2>;
938c2ecf20Sopenharmony_ci            gpio-ranges = <&pinctrl 0 0 176>;
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci            /* Serial Console */
968c2ecf20Sopenharmony_ci            scif4_pins: serial4 {
978c2ecf20Sopenharmony_ci                    pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
988c2ecf20Sopenharmony_ci                             <RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
998c2ecf20Sopenharmony_ci            };
1008c2ecf20Sopenharmony_ci    };
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