18c2ecf20Sopenharmony_ciQualcomm PMIC GPIO block 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThis binding describes the GPIO block(s) found in the 8xxx series of 48c2ecf20Sopenharmony_ciPMIC's from Qualcomm. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci- compatible: 78c2ecf20Sopenharmony_ci Usage: required 88c2ecf20Sopenharmony_ci Value type: <string> 98c2ecf20Sopenharmony_ci Definition: must be one of: 108c2ecf20Sopenharmony_ci "qcom,pm8005-gpio" 118c2ecf20Sopenharmony_ci "qcom,pm8018-gpio" 128c2ecf20Sopenharmony_ci "qcom,pm8038-gpio" 138c2ecf20Sopenharmony_ci "qcom,pm8058-gpio" 148c2ecf20Sopenharmony_ci "qcom,pm8916-gpio" 158c2ecf20Sopenharmony_ci "qcom,pm8917-gpio" 168c2ecf20Sopenharmony_ci "qcom,pm8921-gpio" 178c2ecf20Sopenharmony_ci "qcom,pm8941-gpio" 188c2ecf20Sopenharmony_ci "qcom,pm8950-gpio" 198c2ecf20Sopenharmony_ci "qcom,pm8994-gpio" 208c2ecf20Sopenharmony_ci "qcom,pm8998-gpio" 218c2ecf20Sopenharmony_ci "qcom,pma8084-gpio" 228c2ecf20Sopenharmony_ci "qcom,pmi8950-gpio" 238c2ecf20Sopenharmony_ci "qcom,pmi8994-gpio" 248c2ecf20Sopenharmony_ci "qcom,pmi8998-gpio" 258c2ecf20Sopenharmony_ci "qcom,pms405-gpio" 268c2ecf20Sopenharmony_ci "qcom,pm660-gpio" 278c2ecf20Sopenharmony_ci "qcom,pm660l-gpio" 288c2ecf20Sopenharmony_ci "qcom,pm8150-gpio" 298c2ecf20Sopenharmony_ci "qcom,pm8150b-gpio" 308c2ecf20Sopenharmony_ci "qcom,pm6150-gpio" 318c2ecf20Sopenharmony_ci "qcom,pm6150l-gpio" 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" 348c2ecf20Sopenharmony_ci if the device is on an spmi bus or an ssbi bus respectively 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci- reg: 378c2ecf20Sopenharmony_ci Usage: required 388c2ecf20Sopenharmony_ci Value type: <prop-encoded-array> 398c2ecf20Sopenharmony_ci Definition: Register base of the GPIO block and length. 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci- interrupts: 428c2ecf20Sopenharmony_ci Usage: required 438c2ecf20Sopenharmony_ci Value type: <prop-encoded-array> 448c2ecf20Sopenharmony_ci Definition: Must contain an array of encoded interrupt specifiers for 458c2ecf20Sopenharmony_ci each available GPIO 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci- gpio-controller: 488c2ecf20Sopenharmony_ci Usage: required 498c2ecf20Sopenharmony_ci Value type: <none> 508c2ecf20Sopenharmony_ci Definition: Mark the device node as a GPIO controller 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci- #gpio-cells: 538c2ecf20Sopenharmony_ci Usage: required 548c2ecf20Sopenharmony_ci Value type: <u32> 558c2ecf20Sopenharmony_ci Definition: Must be 2; 568c2ecf20Sopenharmony_ci the first cell will be used to define gpio number and the 578c2ecf20Sopenharmony_ci second denotes the flags for this gpio 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ciPlease refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 608c2ecf20Sopenharmony_cia general description of GPIO and interrupt bindings. 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ciPlease refer to pinctrl-bindings.txt in this directory for details of the 638c2ecf20Sopenharmony_cicommon pinctrl bindings used by client devices, including the meaning of the 648c2ecf20Sopenharmony_ciphrase "pin configuration node". 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ciThe pin configuration nodes act as a container for an arbitrary number of 678c2ecf20Sopenharmony_cisubnodes. Each of these subnodes represents some desired configuration for a 688c2ecf20Sopenharmony_cipin or a list of pins. This configuration can include the 698c2ecf20Sopenharmony_cimux function to select on those pin(s), and various pin configuration 708c2ecf20Sopenharmony_ciparameters, as listed below. 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ciSUBNODES: 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ciThe name of each subnode is not important; all subnodes should be enumerated 768c2ecf20Sopenharmony_ciand processed purely based on their content. 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ciEach subnode only affects those parameters that are explicitly listed. In 798c2ecf20Sopenharmony_ciother words, a subnode that lists a mux function but no pin configuration 808c2ecf20Sopenharmony_ciparameters implies no information about any pin configuration parameters. 818c2ecf20Sopenharmony_ciSimilarly, a pin subnode that describes a pullup parameter implies no 828c2ecf20Sopenharmony_ciinformation about e.g. the mux function. 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ciThe following generic properties as defined in pinctrl-bindings.txt are valid 858c2ecf20Sopenharmony_cito specify in a pin configuration subnode: 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci- pins: 888c2ecf20Sopenharmony_ci Usage: required 898c2ecf20Sopenharmony_ci Value type: <string-array> 908c2ecf20Sopenharmony_ci Definition: List of gpio pins affected by the properties specified in 918c2ecf20Sopenharmony_ci this subnode. Valid pins are: 928c2ecf20Sopenharmony_ci gpio1-gpio4 for pm8005 938c2ecf20Sopenharmony_ci gpio1-gpio6 for pm8018 948c2ecf20Sopenharmony_ci gpio1-gpio12 for pm8038 958c2ecf20Sopenharmony_ci gpio1-gpio40 for pm8058 968c2ecf20Sopenharmony_ci gpio1-gpio4 for pm8916 978c2ecf20Sopenharmony_ci gpio1-gpio38 for pm8917 988c2ecf20Sopenharmony_ci gpio1-gpio44 for pm8921 998c2ecf20Sopenharmony_ci gpio1-gpio36 for pm8941 1008c2ecf20Sopenharmony_ci gpio1-gpio8 for pm8950 (hole on gpio3) 1018c2ecf20Sopenharmony_ci gpio1-gpio22 for pm8994 1028c2ecf20Sopenharmony_ci gpio1-gpio26 for pm8998 1038c2ecf20Sopenharmony_ci gpio1-gpio22 for pma8084 1048c2ecf20Sopenharmony_ci gpio1-gpio2 for pmi8950 1058c2ecf20Sopenharmony_ci gpio1-gpio10 for pmi8994 1068c2ecf20Sopenharmony_ci gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10) 1078c2ecf20Sopenharmony_ci gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 1088c2ecf20Sopenharmony_ci and gpio8) 1098c2ecf20Sopenharmony_ci gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) 1108c2ecf20Sopenharmony_ci gpio1-gpio12 for pm8150l (hole on gpio7) 1118c2ecf20Sopenharmony_ci gpio1-gpio10 for pm6150 1128c2ecf20Sopenharmony_ci gpio1-gpio12 for pm6150l 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci- function: 1158c2ecf20Sopenharmony_ci Usage: required 1168c2ecf20Sopenharmony_ci Value type: <string> 1178c2ecf20Sopenharmony_ci Definition: Specify the alternative function to be configured for the 1188c2ecf20Sopenharmony_ci specified pins. Valid values are: 1198c2ecf20Sopenharmony_ci "normal", 1208c2ecf20Sopenharmony_ci "paired", 1218c2ecf20Sopenharmony_ci "func1", 1228c2ecf20Sopenharmony_ci "func2", 1238c2ecf20Sopenharmony_ci "dtest1", 1248c2ecf20Sopenharmony_ci "dtest2", 1258c2ecf20Sopenharmony_ci "dtest3", 1268c2ecf20Sopenharmony_ci "dtest4", 1278c2ecf20Sopenharmony_ci And following values are supported by LV/MV GPIO subtypes: 1288c2ecf20Sopenharmony_ci "func3", 1298c2ecf20Sopenharmony_ci "func4" 1308c2ecf20Sopenharmony_ci 1318c2ecf20Sopenharmony_ci- bias-disable: 1328c2ecf20Sopenharmony_ci Usage: optional 1338c2ecf20Sopenharmony_ci Value type: <none> 1348c2ecf20Sopenharmony_ci Definition: The specified pins should be configured as no pull. 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ci- bias-pull-down: 1378c2ecf20Sopenharmony_ci Usage: optional 1388c2ecf20Sopenharmony_ci Value type: <none> 1398c2ecf20Sopenharmony_ci Definition: The specified pins should be configured as pull down. 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ci- bias-pull-up: 1428c2ecf20Sopenharmony_ci Usage: optional 1438c2ecf20Sopenharmony_ci Value type: <empty> 1448c2ecf20Sopenharmony_ci Definition: The specified pins should be configured as pull up. 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci- qcom,pull-up-strength: 1478c2ecf20Sopenharmony_ci Usage: optional 1488c2ecf20Sopenharmony_ci Value type: <u32> 1498c2ecf20Sopenharmony_ci Definition: Specifies the strength to use for pull up, if selected. 1508c2ecf20Sopenharmony_ci Valid values are; as defined in 1518c2ecf20Sopenharmony_ci <dt-bindings/pinctrl/qcom,pmic-gpio.h>: 1528c2ecf20Sopenharmony_ci 1: 30uA (PMIC_GPIO_PULL_UP_30) 1538c2ecf20Sopenharmony_ci 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5) 1548c2ecf20Sopenharmony_ci 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5) 1558c2ecf20Sopenharmony_ci 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30) 1568c2ecf20Sopenharmony_ci If this property is omitted 30uA strength will be used if 1578c2ecf20Sopenharmony_ci pull up is selected 1588c2ecf20Sopenharmony_ci 1598c2ecf20Sopenharmony_ci- bias-high-impedance: 1608c2ecf20Sopenharmony_ci Usage: optional 1618c2ecf20Sopenharmony_ci Value type: <none> 1628c2ecf20Sopenharmony_ci Definition: The specified pins will put in high-Z mode and disabled. 1638c2ecf20Sopenharmony_ci 1648c2ecf20Sopenharmony_ci- input-enable: 1658c2ecf20Sopenharmony_ci Usage: optional 1668c2ecf20Sopenharmony_ci Value type: <none> 1678c2ecf20Sopenharmony_ci Definition: The specified pins are put in input mode. 1688c2ecf20Sopenharmony_ci 1698c2ecf20Sopenharmony_ci- output-high: 1708c2ecf20Sopenharmony_ci Usage: optional 1718c2ecf20Sopenharmony_ci Value type: <none> 1728c2ecf20Sopenharmony_ci Definition: The specified pins are configured in output mode, driven 1738c2ecf20Sopenharmony_ci high. 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_ci- output-low: 1768c2ecf20Sopenharmony_ci Usage: optional 1778c2ecf20Sopenharmony_ci Value type: <none> 1788c2ecf20Sopenharmony_ci Definition: The specified pins are configured in output mode, driven 1798c2ecf20Sopenharmony_ci low. 1808c2ecf20Sopenharmony_ci 1818c2ecf20Sopenharmony_ci- power-source: 1828c2ecf20Sopenharmony_ci Usage: optional 1838c2ecf20Sopenharmony_ci Value type: <u32> 1848c2ecf20Sopenharmony_ci Definition: Selects the power source for the specified pins. Valid 1858c2ecf20Sopenharmony_ci power sources are defined per chip in 1868c2ecf20Sopenharmony_ci <dt-bindings/pinctrl/qcom,pmic-gpio.h> 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_ci- qcom,drive-strength: 1898c2ecf20Sopenharmony_ci Usage: optional 1908c2ecf20Sopenharmony_ci Value type: <u32> 1918c2ecf20Sopenharmony_ci Definition: Selects the drive strength for the specified pins. Value 1928c2ecf20Sopenharmony_ci drive strengths are: 1938c2ecf20Sopenharmony_ci 0: no (PMIC_GPIO_STRENGTH_NO) 1948c2ecf20Sopenharmony_ci 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V 1958c2ecf20Sopenharmony_ci 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V 1968c2ecf20Sopenharmony_ci 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V 1978c2ecf20Sopenharmony_ci as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h> 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_ci- drive-push-pull: 2008c2ecf20Sopenharmony_ci Usage: optional 2018c2ecf20Sopenharmony_ci Value type: <none> 2028c2ecf20Sopenharmony_ci Definition: The specified pins are configured in push-pull mode. 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ci- drive-open-drain: 2058c2ecf20Sopenharmony_ci Usage: optional 2068c2ecf20Sopenharmony_ci Value type: <none> 2078c2ecf20Sopenharmony_ci Definition: The specified pins are configured in open-drain mode. 2088c2ecf20Sopenharmony_ci 2098c2ecf20Sopenharmony_ci- drive-open-source: 2108c2ecf20Sopenharmony_ci Usage: optional 2118c2ecf20Sopenharmony_ci Value type: <none> 2128c2ecf20Sopenharmony_ci Definition: The specified pins are configured in open-source mode. 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ci- qcom,analog-pass: 2158c2ecf20Sopenharmony_ci Usage: optional 2168c2ecf20Sopenharmony_ci Value type: <none> 2178c2ecf20Sopenharmony_ci Definition: The specified pins are configured in analog-pass-through mode. 2188c2ecf20Sopenharmony_ci 2198c2ecf20Sopenharmony_ci- qcom,atest: 2208c2ecf20Sopenharmony_ci Usage: optional 2218c2ecf20Sopenharmony_ci Value type: <u32> 2228c2ecf20Sopenharmony_ci Definition: Selects ATEST rail to route to GPIO when it's configured 2238c2ecf20Sopenharmony_ci in analog-pass-through mode. 2248c2ecf20Sopenharmony_ci Valid values are 1-4 corresponding to ATEST1 to ATEST4. 2258c2ecf20Sopenharmony_ci 2268c2ecf20Sopenharmony_ci- qcom,dtest-buffer: 2278c2ecf20Sopenharmony_ci Usage: optional 2288c2ecf20Sopenharmony_ci Value type: <u32> 2298c2ecf20Sopenharmony_ci Definition: Selects DTEST rail to route to GPIO when it's configured 2308c2ecf20Sopenharmony_ci as digital input. 2318c2ecf20Sopenharmony_ci Valid values are 1-4 corresponding to DTEST1 to DTEST4. 2328c2ecf20Sopenharmony_ci 2338c2ecf20Sopenharmony_ciExample: 2348c2ecf20Sopenharmony_ci 2358c2ecf20Sopenharmony_ci pm8921_gpio: gpio@150 { 2368c2ecf20Sopenharmony_ci compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 2378c2ecf20Sopenharmony_ci reg = <0x150 0x160>; 2388c2ecf20Sopenharmony_ci interrupts = <192 1>, <193 1>, <194 1>, 2398c2ecf20Sopenharmony_ci <195 1>, <196 1>, <197 1>, 2408c2ecf20Sopenharmony_ci <198 1>, <199 1>, <200 1>, 2418c2ecf20Sopenharmony_ci <201 1>, <202 1>, <203 1>, 2428c2ecf20Sopenharmony_ci <204 1>, <205 1>, <206 1>, 2438c2ecf20Sopenharmony_ci <207 1>, <208 1>, <209 1>, 2448c2ecf20Sopenharmony_ci <210 1>, <211 1>, <212 1>, 2458c2ecf20Sopenharmony_ci <213 1>, <214 1>, <215 1>, 2468c2ecf20Sopenharmony_ci <216 1>, <217 1>, <218 1>, 2478c2ecf20Sopenharmony_ci <219 1>, <220 1>, <221 1>, 2488c2ecf20Sopenharmony_ci <222 1>, <223 1>, <224 1>, 2498c2ecf20Sopenharmony_ci <225 1>, <226 1>, <227 1>, 2508c2ecf20Sopenharmony_ci <228 1>, <229 1>, <230 1>, 2518c2ecf20Sopenharmony_ci <231 1>, <232 1>, <233 1>, 2528c2ecf20Sopenharmony_ci <234 1>, <235 1>; 2538c2ecf20Sopenharmony_ci 2548c2ecf20Sopenharmony_ci gpio-controller; 2558c2ecf20Sopenharmony_ci #gpio-cells = <2>; 2568c2ecf20Sopenharmony_ci 2578c2ecf20Sopenharmony_ci pm8921_gpio_keys: gpio-keys { 2588c2ecf20Sopenharmony_ci volume-keys { 2598c2ecf20Sopenharmony_ci pins = "gpio20", "gpio21"; 2608c2ecf20Sopenharmony_ci function = "normal"; 2618c2ecf20Sopenharmony_ci 2628c2ecf20Sopenharmony_ci input-enable; 2638c2ecf20Sopenharmony_ci bias-pull-up; 2648c2ecf20Sopenharmony_ci drive-push-pull; 2658c2ecf20Sopenharmony_ci qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 2668c2ecf20Sopenharmony_ci power-source = <PM8921_GPIO_S4>; 2678c2ecf20Sopenharmony_ci }; 2688c2ecf20Sopenharmony_ci }; 2698c2ecf20Sopenharmony_ci }; 270