18c2ecf20Sopenharmony_ciQualcomm MSM8660 TLMM block
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci- compatible: "qcom,msm8660-pinctrl"
58c2ecf20Sopenharmony_ci- reg: Should be the base address and length of the TLMM block.
68c2ecf20Sopenharmony_ci- interrupts: Should be the parent IRQ of the TLMM block.
78c2ecf20Sopenharmony_ci- interrupt-controller: Marks the device node as an interrupt controller.
88c2ecf20Sopenharmony_ci- #interrupt-cells: Should be two.
98c2ecf20Sopenharmony_ci- gpio-controller: Marks the device node as a GPIO controller.
108c2ecf20Sopenharmony_ci- #gpio-cells : Should be two.
118c2ecf20Sopenharmony_ci                The first cell is the gpio pin number and the
128c2ecf20Sopenharmony_ci                second cell is used for optional parameters.
138c2ecf20Sopenharmony_ci- gpio-ranges: see ../gpio/gpio.txt
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciOptional properties:
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci- gpio-reserved-ranges: see ../gpio/gpio.txt
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ciPlease refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
208c2ecf20Sopenharmony_cia general description of GPIO and interrupt bindings.
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ciPlease refer to pinctrl-bindings.txt in this directory for details of the
238c2ecf20Sopenharmony_cicommon pinctrl bindings used by client devices, including the meaning of the
248c2ecf20Sopenharmony_ciphrase "pin configuration node".
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ciQualcomm's pin configuration nodes act as a container for an arbitrary number of
278c2ecf20Sopenharmony_cisubnodes. Each of these subnodes represents some desired configuration for a
288c2ecf20Sopenharmony_cipin, a group, or a list of pins or groups. This configuration can include the
298c2ecf20Sopenharmony_cimux function to select on those pin(s)/group(s), and various pin configuration
308c2ecf20Sopenharmony_ciparameters, such as pull-up, drive strength, etc.
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ciThe name of each subnode is not important; all subnodes should be enumerated
338c2ecf20Sopenharmony_ciand processed purely based on their content.
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ciEach subnode only affects those parameters that are explicitly listed. In
368c2ecf20Sopenharmony_ciother words, a subnode that lists a mux function but no pin configuration
378c2ecf20Sopenharmony_ciparameters implies no information about any pin configuration parameters.
388c2ecf20Sopenharmony_ciSimilarly, a pin subnode that describes a pullup parameter implies no
398c2ecf20Sopenharmony_ciinformation about e.g. the mux function.
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ciThe following generic properties as defined in pinctrl-bindings.txt are valid
438c2ecf20Sopenharmony_cito specify in a pin configuration subnode:
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-strength,
468c2ecf20Sopenharmony_ci output-low, output-high.
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ciNon-empty subnodes must specify the 'pins' property.
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ciValid values for pins are:
518c2ecf20Sopenharmony_ci  gpio0-gpio172, sdc3_clk, sdc3_cmd, sdc3_data sdc4_clk, sdc4_cmd, sdc4_data
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ciValid values for function are:
548c2ecf20Sopenharmony_ci  gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a, gp_clk_1b,
558c2ecf20Sopenharmony_ci  gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n,
568c2ecf20Sopenharmony_ci  gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n,
578c2ecf20Sopenharmony_ci  gsbi2_spi_cs3_n, gsbi3, gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n,
588c2ecf20Sopenharmony_ci  gsbi4, gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12, hdmi, i2s,
598c2ecf20Sopenharmony_ci  lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2, sdc5, tsif1, tsif2, usb_fs1,
608c2ecf20Sopenharmony_ci  usb_fs1_oe_n, usb_fs2, usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ciExample:
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci	msmgpio: pinctrl@800000 {
658c2ecf20Sopenharmony_ci		compatible = "qcom,msm8660-pinctrl";
668c2ecf20Sopenharmony_ci		reg = <0x800000 0x4000>;
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci		gpio-controller;
698c2ecf20Sopenharmony_ci		#gpio-cells = <2>;
708c2ecf20Sopenharmony_ci		gpio-ranges = <&msmgpio 0 0 173>;
718c2ecf20Sopenharmony_ci		interrupt-controller;
728c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
738c2ecf20Sopenharmony_ci		interrupts = <0 16 0x4>;
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci		pinctrl-names = "default";
768c2ecf20Sopenharmony_ci		pinctrl-0 = <&gsbi12_uart>;
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci		gsbi12_uart: gsbi12-uart {
798c2ecf20Sopenharmony_ci			mux {
808c2ecf20Sopenharmony_ci				pins = "gpio117", "gpio118";
818c2ecf20Sopenharmony_ci				function = "gsbi12";
828c2ecf20Sopenharmony_ci			};
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci			tx {
858c2ecf20Sopenharmony_ci				pins = "gpio118";
868c2ecf20Sopenharmony_ci				drive-strength = <8>;
878c2ecf20Sopenharmony_ci				bias-disable;
888c2ecf20Sopenharmony_ci			};
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci			rx {
918c2ecf20Sopenharmony_ci				pins = "gpio117";
928c2ecf20Sopenharmony_ci				drive-strength = <2>;
938c2ecf20Sopenharmony_ci				bias-pull-up;
948c2ecf20Sopenharmony_ci			};
958c2ecf20Sopenharmony_ci		};
968c2ecf20Sopenharmony_ci	};
97