18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Qualcomm Technologies, Inc. MSM8226 TLMM block
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Bjorn Andersson <bjorn.andersson@linaro.org>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription: |
138c2ecf20Sopenharmony_ci  This binding describes the Top Level Mode Multiplexer block found in the
148c2ecf20Sopenharmony_ci  MSM8226 platform.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciproperties:
178c2ecf20Sopenharmony_ci  compatible:
188c2ecf20Sopenharmony_ci    const: qcom,msm8226-pinctrl
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci  reg:
218c2ecf20Sopenharmony_ci    description: Specifies the base address and size of the TLMM register space
228c2ecf20Sopenharmony_ci    maxItems: 1
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci  interrupts:
258c2ecf20Sopenharmony_ci    description: Specifies the TLMM summary IRQ
268c2ecf20Sopenharmony_ci    maxItems: 1
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci  interrupt-controller: true
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci  '#interrupt-cells':
318c2ecf20Sopenharmony_ci    description: Specifies the PIN numbers and Flags, as defined in
328c2ecf20Sopenharmony_ci      include/dt-bindings/interrupt-controller/irq.h
338c2ecf20Sopenharmony_ci    const: 2
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci  gpio-controller: true
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci  '#gpio-cells':
388c2ecf20Sopenharmony_ci    description: Specifying the pin number and flags, as defined in
398c2ecf20Sopenharmony_ci      include/dt-bindings/gpio/gpio.h
408c2ecf20Sopenharmony_ci    const: 2
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci  gpio-ranges:
438c2ecf20Sopenharmony_ci    maxItems: 1
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci  gpio-reserved-ranges:
468c2ecf20Sopenharmony_ci    maxItems: 1
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci#PIN CONFIGURATION NODES
498c2ecf20Sopenharmony_cipatternProperties:
508c2ecf20Sopenharmony_ci  '-pins$':
518c2ecf20Sopenharmony_ci    type: object
528c2ecf20Sopenharmony_ci    description:
538c2ecf20Sopenharmony_ci      Pinctrl node's client devices use subnodes for desired pin configuration.
548c2ecf20Sopenharmony_ci      Client device subnodes use below standard properties.
558c2ecf20Sopenharmony_ci    $ref: "/schemas/pinctrl/pincfg-node.yaml"
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci    properties:
588c2ecf20Sopenharmony_ci      pins:
598c2ecf20Sopenharmony_ci        description:
608c2ecf20Sopenharmony_ci          List of gpio pins affected by the properties specified in this
618c2ecf20Sopenharmony_ci          subnode.
628c2ecf20Sopenharmony_ci        items:
638c2ecf20Sopenharmony_ci          oneOf:
648c2ecf20Sopenharmony_ci            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
658c2ecf20Sopenharmony_ci            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
668c2ecf20Sopenharmony_ci        minItems: 1
678c2ecf20Sopenharmony_ci        maxItems: 36
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci      function:
708c2ecf20Sopenharmony_ci        description:
718c2ecf20Sopenharmony_ci          Specify the alternative function to be configured for the specified
728c2ecf20Sopenharmony_ci          pins. Functions are only valid for gpio pins.
738c2ecf20Sopenharmony_ci        enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,
748c2ecf20Sopenharmony_ci                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1,
758c2ecf20Sopenharmony_ci                blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
768c2ecf20Sopenharmony_ci                blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci      drive-strength:
798c2ecf20Sopenharmony_ci        enum: [2, 4, 6, 8, 10, 12, 14, 16]
808c2ecf20Sopenharmony_ci        default: 2
818c2ecf20Sopenharmony_ci        description:
828c2ecf20Sopenharmony_ci          Selects the drive strength for the specified pins, in mA.
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci      bias-pull-down: true
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci      bias-pull-up: true
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ci      bias-disable: true
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci      output-high: true
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci      output-low: true
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ci    required:
958c2ecf20Sopenharmony_ci      - pins
968c2ecf20Sopenharmony_ci      - function
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci    additionalProperties: false
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_cirequired:
1018c2ecf20Sopenharmony_ci  - compatible
1028c2ecf20Sopenharmony_ci  - reg
1038c2ecf20Sopenharmony_ci  - interrupts
1048c2ecf20Sopenharmony_ci  - interrupt-controller
1058c2ecf20Sopenharmony_ci  - '#interrupt-cells'
1068c2ecf20Sopenharmony_ci  - gpio-controller
1078c2ecf20Sopenharmony_ci  - '#gpio-cells'
1088c2ecf20Sopenharmony_ci  - gpio-ranges
1098c2ecf20Sopenharmony_ci
1108c2ecf20Sopenharmony_ciadditionalProperties: false
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ciexamples:
1138c2ecf20Sopenharmony_ci  - |
1148c2ecf20Sopenharmony_ci        #include <dt-bindings/interrupt-controller/arm-gic.h>
1158c2ecf20Sopenharmony_ci        msmgpio: pinctrl@fd510000 {
1168c2ecf20Sopenharmony_ci                compatible = "qcom,msm8226-pinctrl";
1178c2ecf20Sopenharmony_ci                reg = <0xfd510000 0x4000>;
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci                gpio-controller;
1208c2ecf20Sopenharmony_ci                #gpio-cells = <2>;
1218c2ecf20Sopenharmony_ci                gpio-ranges = <&msmgpio 0 0 117>;
1228c2ecf20Sopenharmony_ci                interrupt-controller;
1238c2ecf20Sopenharmony_ci                #interrupt-cells = <2>;
1248c2ecf20Sopenharmony_ci                interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci                serial-pins {
1278c2ecf20Sopenharmony_ci                        pins = "gpio8", "gpio9";
1288c2ecf20Sopenharmony_ci                        function = "blsp_uart3";
1298c2ecf20Sopenharmony_ci                        drive-strength = <8>;
1308c2ecf20Sopenharmony_ci                        bias-disable;
1318c2ecf20Sopenharmony_ci                };
1328c2ecf20Sopenharmony_ci        };
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