18c2ecf20Sopenharmony_ciQualcomm PMIC Multi-Purpose Pin (MPP) block
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThis binding describes the MPP block(s) found in the 8xxx series
48c2ecf20Sopenharmony_ciof PMIC's from Qualcomm.
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci- compatible:
78c2ecf20Sopenharmony_ci	Usage: required
88c2ecf20Sopenharmony_ci	Value type: <string>
98c2ecf20Sopenharmony_ci	Definition: Should contain one of:
108c2ecf20Sopenharmony_ci		    "qcom,pm8018-mpp",
118c2ecf20Sopenharmony_ci		    "qcom,pm8038-mpp",
128c2ecf20Sopenharmony_ci		    "qcom,pm8058-mpp",
138c2ecf20Sopenharmony_ci		    "qcom,pm8821-mpp",
148c2ecf20Sopenharmony_ci		    "qcom,pm8841-mpp",
158c2ecf20Sopenharmony_ci		    "qcom,pm8916-mpp",
168c2ecf20Sopenharmony_ci		    "qcom,pm8917-mpp",
178c2ecf20Sopenharmony_ci		    "qcom,pm8921-mpp",
188c2ecf20Sopenharmony_ci		    "qcom,pm8941-mpp",
198c2ecf20Sopenharmony_ci		    "qcom,pm8950-mpp",
208c2ecf20Sopenharmony_ci		    "qcom,pmi8950-mpp",
218c2ecf20Sopenharmony_ci		    "qcom,pm8994-mpp",
228c2ecf20Sopenharmony_ci		    "qcom,pma8084-mpp",
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci		    And must contain either "qcom,spmi-mpp" or "qcom,ssbi-mpp"
258c2ecf20Sopenharmony_ci		    if the device is on an spmi bus or an ssbi bus respectively.
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci- reg:
288c2ecf20Sopenharmony_ci	Usage: required
298c2ecf20Sopenharmony_ci	Value type: <prop-encoded-array>
308c2ecf20Sopenharmony_ci	Definition: Register base of the MPP block and length.
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci- interrupts:
338c2ecf20Sopenharmony_ci	Usage: required
348c2ecf20Sopenharmony_ci	Value type: <prop-encoded-array>
358c2ecf20Sopenharmony_ci	Definition: Must contain an array of encoded interrupt specifiers for
368c2ecf20Sopenharmony_ci		    each available MPP
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci- gpio-controller:
398c2ecf20Sopenharmony_ci	Usage: required
408c2ecf20Sopenharmony_ci	Value type: <none>
418c2ecf20Sopenharmony_ci	Definition: Mark the device node as a GPIO controller
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci- #gpio-cells:
448c2ecf20Sopenharmony_ci	Usage: required
458c2ecf20Sopenharmony_ci	Value type: <u32>
468c2ecf20Sopenharmony_ci	Definition: Must be 2;
478c2ecf20Sopenharmony_ci		    the first cell will be used to define MPP number and the
488c2ecf20Sopenharmony_ci		    second denotes the flags for this MPP
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ciPlease refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
518c2ecf20Sopenharmony_cia general description of GPIO and interrupt bindings.
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ciPlease refer to pinctrl-bindings.txt in this directory for details of the
548c2ecf20Sopenharmony_cicommon pinctrl bindings used by client devices, including the meaning of the
558c2ecf20Sopenharmony_ciphrase "pin configuration node".
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ciThe pin configuration nodes act as a container for an arbitrary number of
588c2ecf20Sopenharmony_cisubnodes. Each of these subnodes represents some desired configuration for a
598c2ecf20Sopenharmony_cipin or a list of pins. This configuration can include the
608c2ecf20Sopenharmony_cimux function to select on those pin(s), and various pin configuration
618c2ecf20Sopenharmony_ciparameters, as listed below.
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_ciSUBNODES:
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ciThe name of each subnode is not important; all subnodes should be enumerated
668c2ecf20Sopenharmony_ciand processed purely based on their content.
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ciEach subnode only affects those parameters that are explicitly listed. In
698c2ecf20Sopenharmony_ciother words, a subnode that lists a mux function but no pin configuration
708c2ecf20Sopenharmony_ciparameters implies no information about any pin configuration parameters.
718c2ecf20Sopenharmony_ciSimilarly, a pin subnode that describes a pullup parameter implies no
728c2ecf20Sopenharmony_ciinformation about e.g. the mux function.
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ciThe following generic properties as defined in pinctrl-bindings.txt are valid
758c2ecf20Sopenharmony_cito specify in a pin configuration subnode:
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci- pins:
788c2ecf20Sopenharmony_ci	Usage: required
798c2ecf20Sopenharmony_ci	Value type: <string-array>
808c2ecf20Sopenharmony_ci	Definition: List of MPP pins affected by the properties specified in
818c2ecf20Sopenharmony_ci		    this subnode.  Valid pins are:
828c2ecf20Sopenharmony_ci		    mpp1-mpp4 for pm8841
838c2ecf20Sopenharmony_ci		    mpp1-mpp4 for pm8916
848c2ecf20Sopenharmony_ci		    mpp1-mpp8 for pm8941
858c2ecf20Sopenharmony_ci		    mpp1-mpp4 for pm8950
868c2ecf20Sopenharmony_ci		    mpp1-mpp4 for pmi8950
878c2ecf20Sopenharmony_ci		    mpp1-mpp4 for pma8084
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci- function:
908c2ecf20Sopenharmony_ci	Usage: required
918c2ecf20Sopenharmony_ci	Value type: <string>
928c2ecf20Sopenharmony_ci	Definition: Specify the alternative function to be configured for the
938c2ecf20Sopenharmony_ci		    specified pins.  Valid values are:
948c2ecf20Sopenharmony_ci		    "digital",
958c2ecf20Sopenharmony_ci		    "analog",
968c2ecf20Sopenharmony_ci		    "sink"
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci- bias-disable:
998c2ecf20Sopenharmony_ci	Usage: optional
1008c2ecf20Sopenharmony_ci	Value type: <none>
1018c2ecf20Sopenharmony_ci	Definition: The specified pins should be configured as no pull.
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci- bias-pull-up:
1048c2ecf20Sopenharmony_ci	Usage: optional
1058c2ecf20Sopenharmony_ci	Value type: <u32>
1068c2ecf20Sopenharmony_ci	Definition: The specified pins should be configured as pull up.
1078c2ecf20Sopenharmony_ci		    Valid values are 600, 10000 and 30000 in bidirectional mode
1088c2ecf20Sopenharmony_ci		    only, i.e. when operating in qcom,analog-mode and input and
1098c2ecf20Sopenharmony_ci		    outputs are enabled. The hardware ignores the configuration
1108c2ecf20Sopenharmony_ci		    when operating in other modes.
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci- bias-high-impedance:
1138c2ecf20Sopenharmony_ci	Usage: optional
1148c2ecf20Sopenharmony_ci	Value type: <none>
1158c2ecf20Sopenharmony_ci	Definition: The specified pins will put in high-Z mode and disabled.
1168c2ecf20Sopenharmony_ci
1178c2ecf20Sopenharmony_ci- input-enable:
1188c2ecf20Sopenharmony_ci	Usage: optional
1198c2ecf20Sopenharmony_ci	Value type: <none>
1208c2ecf20Sopenharmony_ci	Definition: The specified pins are put in input mode, i.e. their input
1218c2ecf20Sopenharmony_ci		    buffer is enabled
1228c2ecf20Sopenharmony_ci
1238c2ecf20Sopenharmony_ci- output-high:
1248c2ecf20Sopenharmony_ci	Usage: optional
1258c2ecf20Sopenharmony_ci	Value type: <none>
1268c2ecf20Sopenharmony_ci	Definition: The specified pins are configured in output mode, driven
1278c2ecf20Sopenharmony_ci		    high.
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_ci- output-low:
1308c2ecf20Sopenharmony_ci	Usage: optional
1318c2ecf20Sopenharmony_ci	Value type: <none>
1328c2ecf20Sopenharmony_ci	Definition: The specified pins are configured in output mode, driven
1338c2ecf20Sopenharmony_ci		    low.
1348c2ecf20Sopenharmony_ci
1358c2ecf20Sopenharmony_ci- power-source:
1368c2ecf20Sopenharmony_ci	Usage: optional
1378c2ecf20Sopenharmony_ci	Value type: <u32>
1388c2ecf20Sopenharmony_ci	Definition: Selects the power source for the specified pins. Valid power
1398c2ecf20Sopenharmony_ci		    sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
1408c2ecf20Sopenharmony_ci
1418c2ecf20Sopenharmony_ci- qcom,analog-level:
1428c2ecf20Sopenharmony_ci	Usage: optional
1438c2ecf20Sopenharmony_ci	Value type: <u32>
1448c2ecf20Sopenharmony_ci	Definition: Selects the source for analog output. Valued values are
1458c2ecf20Sopenharmony_ci		    defined in <dt-binding/pinctrl/qcom,pmic-mpp.h>
1468c2ecf20Sopenharmony_ci		    PMIC_MPP_AOUT_LVL_*
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci- qcom,dtest:
1498c2ecf20Sopenharmony_ci	Usage: optional
1508c2ecf20Sopenharmony_ci	Value type: <u32>
1518c2ecf20Sopenharmony_ci	Definition: Selects which dtest rail to be routed in the various functions.
1528c2ecf20Sopenharmony_ci		    Valid values are 1-4
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ci- qcom,amux-route:
1558c2ecf20Sopenharmony_ci	Usage: optional
1568c2ecf20Sopenharmony_ci	Value type: <u32>
1578c2ecf20Sopenharmony_ci	Definition: Selects the source for analog input. Valid values are
1588c2ecf20Sopenharmony_ci		    defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
1598c2ecf20Sopenharmony_ci		    PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6...
1608c2ecf20Sopenharmony_ci- qcom,paired:
1618c2ecf20Sopenharmony_ci	Usage: optional
1628c2ecf20Sopenharmony_ci	Value type: <none>
1638c2ecf20Sopenharmony_ci	Definition: Indicates that the pin should be operating in paired mode.
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_ciExample:
1668c2ecf20Sopenharmony_ci
1678c2ecf20Sopenharmony_ci	mpps@a000 {
1688c2ecf20Sopenharmony_ci		compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp";
1698c2ecf20Sopenharmony_ci		reg = <0xa000>;
1708c2ecf20Sopenharmony_ci		gpio-controller;
1718c2ecf20Sopenharmony_ci		#gpio-cells = <2>;
1728c2ecf20Sopenharmony_ci		interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;
1738c2ecf20Sopenharmony_ci
1748c2ecf20Sopenharmony_ci		pinctrl-names = "default";
1758c2ecf20Sopenharmony_ci		pinctrl-0 = <&pm8841_default>;
1768c2ecf20Sopenharmony_ci
1778c2ecf20Sopenharmony_ci		pm8841_default: default {
1788c2ecf20Sopenharmony_ci			gpio {
1798c2ecf20Sopenharmony_ci				pins = "mpp1", "mpp2", "mpp3", "mpp4";
1808c2ecf20Sopenharmony_ci				function = "digital";
1818c2ecf20Sopenharmony_ci				input-enable;
1828c2ecf20Sopenharmony_ci				power-source = <PM8841_MPP_S3>;
1838c2ecf20Sopenharmony_ci			};
1848c2ecf20Sopenharmony_ci		};
1858c2ecf20Sopenharmony_ci	};
186