18c2ecf20Sopenharmony_ciCSR SiRFprimaII pinmux controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci- compatible	: "sirf,prima2-pinctrl"
58c2ecf20Sopenharmony_ci- reg		: Address range of the pinctrl registers
68c2ecf20Sopenharmony_ci- interrupts    : Interrupts used by every GPIO group
78c2ecf20Sopenharmony_ci- gpio-controller : Indicates this device is a GPIO controller
88c2ecf20Sopenharmony_ci- interrupt-controller  : Marks the device node as an interrupt controller
98c2ecf20Sopenharmony_ciOptional properties:
108c2ecf20Sopenharmony_ci- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
118c2ecf20Sopenharmony_ci- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciPlease refer to pinctrl-bindings.txt in this directory for details of the common
148c2ecf20Sopenharmony_cipinctrl bindings used by client devices.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciSiRFprimaII's pinmux nodes act as a container for an arbitrary number of subnodes.
178c2ecf20Sopenharmony_ciEach of these subnodes represents some desired configuration for a group of pins.
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ciRequired subnode-properties:
208c2ecf20Sopenharmony_ci- sirf,pins : An array of strings. Each string contains the name of a group.
218c2ecf20Sopenharmony_ci- sirf,function: A string containing the name of the function to mux to the
228c2ecf20Sopenharmony_ci  group.
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci  Valid values for group and function names can be found from looking at the
258c2ecf20Sopenharmony_ci  group and function arrays in driver files:
268c2ecf20Sopenharmony_ci  drivers/pinctrl/pinctrl-sirf.c
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ciFor example, pinctrl might have subnodes like the following:
298c2ecf20Sopenharmony_ci uart2_pins_a: uart2@0 {
308c2ecf20Sopenharmony_ci         uart {
318c2ecf20Sopenharmony_ci                 sirf,pins = "uart2grp";
328c2ecf20Sopenharmony_ci                 sirf,function = "uart2";
338c2ecf20Sopenharmony_ci         };
348c2ecf20Sopenharmony_ci };
358c2ecf20Sopenharmony_ci uart2_noflow_pins_a: uart2@1 {
368c2ecf20Sopenharmony_ci         uart {
378c2ecf20Sopenharmony_ci                 sirf,pins = "uart2_nostreamctrlgrp";
388c2ecf20Sopenharmony_ci                 sirf,function = "uart2_nostreamctrl";
398c2ecf20Sopenharmony_ci         };
408c2ecf20Sopenharmony_ci };
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ciFor a specific board, if it wants to use uart2 without hardware flow control,
438c2ecf20Sopenharmony_ciit can add the following to its board-specific .dts file.
448c2ecf20Sopenharmony_ciuart2: uart@b0070000 {
458c2ecf20Sopenharmony_ci	pinctrl-names = "default";
468c2ecf20Sopenharmony_ci	pinctrl-0 = <&uart2_noflow_pins_a>;
478c2ecf20Sopenharmony_ci}
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