18c2ecf20Sopenharmony_ciPalmas Pincontrol bindings 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe pins of Palmas device can be set on different option and provides 48c2ecf20Sopenharmony_cithe configuration for Pull UP/DOWN, open drain etc. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci- compatible: It must be one of following: 88c2ecf20Sopenharmony_ci - "ti,palmas-pinctrl" for Palma series of the pincontrol. 98c2ecf20Sopenharmony_ci - "ti,tps65913-pinctrl" for Palma series device TPS65913. 108c2ecf20Sopenharmony_ci - "ti,tps80036-pinctrl" for Palma series device TPS80036. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciPlease refer to pinctrl-bindings.txt in this directory for details of the 138c2ecf20Sopenharmony_cicommon pinctrl bindings used by client devices, including the meaning of the 148c2ecf20Sopenharmony_ciphrase "pin configuration node". 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciPalmas's pin configuration nodes act as a container for an arbitrary number of 178c2ecf20Sopenharmony_cisubnodes. Each of these subnodes represents some desired configuration for a 188c2ecf20Sopenharmony_cilist of pins. This configuration can include the mux function to select on 198c2ecf20Sopenharmony_cithose pin(s), and various pin configuration parameters, such as pull-up, 208c2ecf20Sopenharmony_ciopen drain. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciThe name of each subnode is not important; all subnodes should be enumerated 238c2ecf20Sopenharmony_ciand processed purely based on their content. 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciEach subnode only affects those parameters that are explicitly listed. In 268c2ecf20Sopenharmony_ciother words, a subnode that lists a mux function but no pin configuration 278c2ecf20Sopenharmony_ciparameters implies no information about any pin configuration parameters. 288c2ecf20Sopenharmony_ciSimilarly, a pin subnode that describes a pullup parameter implies no 298c2ecf20Sopenharmony_ciinformation about e.g. the mux function. 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciOptional properties: 328c2ecf20Sopenharmony_ci- ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode. 338c2ecf20Sopenharmony_ci Selection primary or secondary function associated to I2C2_SCL_SCE, 348c2ecf20Sopenharmony_ci I2C2_SDA_SDO pin/pad for DVFS1 interface 358c2ecf20Sopenharmony_ci- ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode. 368c2ecf20Sopenharmony_ci Selection primary or secondary function associated to GPADC_START 378c2ecf20Sopenharmony_ci and SYSEN2 pin/pad for DVFS2 interface 388c2ecf20Sopenharmony_ci- ti,palmas-override-powerhold: This is applicable for PMICs for which 398c2ecf20Sopenharmony_ci GPIO7 is configured in POWERHOLD mode which has higher priority 408c2ecf20Sopenharmony_ci over DEV_ON bit and keeps the PMIC supplies on even after the DEV_ON 418c2ecf20Sopenharmony_ci bit is turned off. This property enables driver to over ride the 428c2ecf20Sopenharmony_ci POWERHOLD value to GPIO7 so as to turn off the PMIC in power off 438c2ecf20Sopenharmony_ci scenarios. So for GPIO7 if ti,palmas-override-powerhold is set 448c2ecf20Sopenharmony_ci then the GPIO_7 field should never be muxed to anything else. 458c2ecf20Sopenharmony_ci It should be set to POWERHOLD by default and only in case of 468c2ecf20Sopenharmony_ci power off scenarios the driver will over ride the mux value. 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ciThis binding uses the following generic properties as defined in 498c2ecf20Sopenharmony_cipinctrl-bindings.txt: 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ciRequired: pins 528c2ecf20Sopenharmony_ciOptions: function, bias-disable, bias-pull-up, bias-pull-down, 538c2ecf20Sopenharmony_ci drive-open-drain. 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ciNote that many of these properties are only valid for certain specific pins. 568c2ecf20Sopenharmony_ciSee the Palmas device datasheet for complete details regarding which pins 578c2ecf20Sopenharmony_cisupport which functionality. 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ciValid values for pin names are: 608c2ecf20Sopenharmony_ci gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7, gpio8, gpio9, 618c2ecf20Sopenharmony_ci gpio10, gpio11, gpio12, gpio13, gpio14, gpio15, vac, powergood, 628c2ecf20Sopenharmony_ci nreswarm, pwrdown, gpadc_start, reset_in, nsleep, enable1, enable2, 638c2ecf20Sopenharmony_ci int. 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ciValid value of function names are: 668c2ecf20Sopenharmony_ci gpio, led, pwm, regen, sysen, clk32kgaudio, id, vbus_det, chrg_det, 678c2ecf20Sopenharmony_ci vac, vacok, powergood, usb_psel, msecure, pwrhold, int, nreswarm, 688c2ecf20Sopenharmony_ci simrsto, simrsti, low_vbat, wireless_chrg1, rcm, pwrdown, gpadc_start, 698c2ecf20Sopenharmony_ci reset_in, nsleep, enable. 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ciThere are 4 special functions: opt0, opt1, opt2 and opt3. If any of these 728c2ecf20Sopenharmony_cifunctions is selected then directly pins register will be written with 0, 1, 2 738c2ecf20Sopenharmony_cior 3 respectively if it is valid for that pins or list of pins. 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ciExample: 768c2ecf20Sopenharmony_ci palmas: tps65913 { 778c2ecf20Sopenharmony_ci .... 788c2ecf20Sopenharmony_ci pinctrl { 798c2ecf20Sopenharmony_ci compatible = "ti,tps65913-pinctrl"; 808c2ecf20Sopenharmony_ci ti,palmas-enable-dvfs1; 818c2ecf20Sopenharmony_ci pinctrl-names = "default"; 828c2ecf20Sopenharmony_ci pinctrl-0 = <&palmas_pins_state>; 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ci palmas_pins_state: pinmux { 858c2ecf20Sopenharmony_ci gpio0 { 868c2ecf20Sopenharmony_ci pins = "gpio0"; 878c2ecf20Sopenharmony_ci function = "id"; 888c2ecf20Sopenharmony_ci bias-pull-up; 898c2ecf20Sopenharmony_ci }; 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci vac { 928c2ecf20Sopenharmony_ci pins = "vac"; 938c2ecf20Sopenharmony_ci function = "vacok"; 948c2ecf20Sopenharmony_ci bias-pull-down; 958c2ecf20Sopenharmony_ci }; 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci gpio5 { 988c2ecf20Sopenharmony_ci pins = "gpio5"; 998c2ecf20Sopenharmony_ci function = "opt0"; 1008c2ecf20Sopenharmony_ci drive-open-drain = <1>; 1018c2ecf20Sopenharmony_ci }; 1028c2ecf20Sopenharmony_ci }; 1038c2ecf20Sopenharmony_ci }; 1048c2ecf20Sopenharmony_ci .... 1058c2ecf20Sopenharmony_ci }; 106