18c2ecf20Sopenharmony_ci* Freescale IMX35 IOMUX Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciPlease refer to fsl,imx-pinctrl.txt in this directory for common binding part 48c2ecf20Sopenharmony_ciand usage. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci- compatible: "fsl,imx35-iomuxc" 88c2ecf20Sopenharmony_ci- fsl,pins: two integers array, represents a group of pins mux and config 98c2ecf20Sopenharmony_ci setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a 108c2ecf20Sopenharmony_ci pin working on a specific function, CONFIG is the pad setting value like 118c2ecf20Sopenharmony_ci pull-up for this pin. Please refer to imx35 datasheet for the valid pad 128c2ecf20Sopenharmony_ci config settings. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciCONFIG bits definition: 158c2ecf20Sopenharmony_ciPAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13) 168c2ecf20Sopenharmony_ciPAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13) 178c2ecf20Sopenharmony_ciPAD_CTL_HYS (1 << 8) 188c2ecf20Sopenharmony_ciPAD_CTL_PKE (1 << 7) 198c2ecf20Sopenharmony_ciPAD_CTL_PUE (1 << 6) 208c2ecf20Sopenharmony_ciPAD_CTL_PUS_100K_DOWN (0 << 4) 218c2ecf20Sopenharmony_ciPAD_CTL_PUS_47K_UP (1 << 4) 228c2ecf20Sopenharmony_ciPAD_CTL_PUS_100K_UP (2 << 4) 238c2ecf20Sopenharmony_ciPAD_CTL_PUS_22K_UP (3 << 4) 248c2ecf20Sopenharmony_ciPAD_CTL_ODE_CMOS (0 << 3) 258c2ecf20Sopenharmony_ciPAD_CTL_ODE_OPENDRAIN (1 << 3) 268c2ecf20Sopenharmony_ciPAD_CTL_DSE_NOMINAL (0 << 1) 278c2ecf20Sopenharmony_ciPAD_CTL_DSE_HIGH (1 << 1) 288c2ecf20Sopenharmony_ciPAD_CTL_DSE_MAX (2 << 1) 298c2ecf20Sopenharmony_ciPAD_CTL_SRE_FAST (1 << 0) 308c2ecf20Sopenharmony_ciPAD_CTL_SRE_SLOW (0 << 0) 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ciRefer to imx35-pinfunc.h in device tree source folder for all available 338c2ecf20Sopenharmony_ciimx35 PIN_FUNC_ID. 34