18c2ecf20Sopenharmony_ci* Freescale IMX27 IOMUX Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible: "fsl,imx27-iomuxc" 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciThe iomuxc driver node should define subnodes containing of pinctrl configuration subnodes. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired properties for pin configuration node: 98c2ecf20Sopenharmony_ci- fsl,pins: three integers array, represents a group of pins mux and config 108c2ecf20Sopenharmony_ci setting. The format is fsl,pins = <PIN MUX_ID CONFIG>. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable 138c2ecf20Sopenharmony_ci configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin 148c2ecf20Sopenharmony_ci number on the specific port (between 0 and 31). 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci MUX_ID is 178c2ecf20Sopenharmony_ci function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10) 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci function value is used to select the pin function. 208c2ecf20Sopenharmony_ci Possible values: 218c2ecf20Sopenharmony_ci 0 - Primary function 228c2ecf20Sopenharmony_ci 1 - Alternate function 238c2ecf20Sopenharmony_ci 2 - GPIO 248c2ecf20Sopenharmony_ci Registers: GIUS (GPIO In Use), GPR (General Purpose Register) 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci direction defines the data direction of the pin. 278c2ecf20Sopenharmony_ci Possible values: 288c2ecf20Sopenharmony_ci 0 - Input 298c2ecf20Sopenharmony_ci 1 - Output 308c2ecf20Sopenharmony_ci Register: DDIR 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci gpio_oconf configures the gpio submodule output signal. This does not 338c2ecf20Sopenharmony_ci have any effect unless GPIO function is selected. A/B/C_IN are output 348c2ecf20Sopenharmony_ci signals of function blocks A,B and C. Specific function blocks are 358c2ecf20Sopenharmony_ci described in the reference manual. 368c2ecf20Sopenharmony_ci Possible values: 378c2ecf20Sopenharmony_ci 0 - A_IN 388c2ecf20Sopenharmony_ci 1 - B_IN 398c2ecf20Sopenharmony_ci 2 - C_IN 408c2ecf20Sopenharmony_ci 3 - Data Register 418c2ecf20Sopenharmony_ci Registers: OCR1, OCR2 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci gpio_iconfa/b configures the gpio submodule input to functionblocks A and 448c2ecf20Sopenharmony_ci B. GPIO function should be selected if this is configured. 458c2ecf20Sopenharmony_ci Possible values: 468c2ecf20Sopenharmony_ci 0 - GPIO_IN 478c2ecf20Sopenharmony_ci 1 - Interrupt Status Register 488c2ecf20Sopenharmony_ci 2 - Pulldown 498c2ecf20Sopenharmony_ci 3 - Pullup 508c2ecf20Sopenharmony_ci Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci CONFIG can be 0 or 1, meaning Pullup disable/enable. 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ciThe iomux controller has gpio child nodes which are embedded in the iomux 568c2ecf20Sopenharmony_cicontrol registers. They have to be defined as child nodes of the iomux device 578c2ecf20Sopenharmony_cinode. If gpio subnodes are defined "#address-cells", "#size-cells" and "ranges" 588c2ecf20Sopenharmony_ciproperties for the iomux device node are required. 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ciExample: 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ciiomuxc: iomuxc@10015000 { 638c2ecf20Sopenharmony_ci compatible = "fsl,imx27-iomuxc"; 648c2ecf20Sopenharmony_ci reg = <0x10015000 0x600>; 658c2ecf20Sopenharmony_ci #address-cells = <1>; 668c2ecf20Sopenharmony_ci #size-cells = <1>; 678c2ecf20Sopenharmony_ci ranges; 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci gpio1: gpio@10015000 { 708c2ecf20Sopenharmony_ci ... 718c2ecf20Sopenharmony_ci }; 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci ... 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci uart { 768c2ecf20Sopenharmony_ci pinctrl_uart1: uart-1 { 778c2ecf20Sopenharmony_ci fsl,pins = < 788c2ecf20Sopenharmony_ci 0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */ 798c2ecf20Sopenharmony_ci 0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */ 808c2ecf20Sopenharmony_ci 0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */ 818c2ecf20Sopenharmony_ci 0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */ 828c2ecf20Sopenharmony_ci >; 838c2ecf20Sopenharmony_ci }; 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci ... 868c2ecf20Sopenharmony_ci }; 878c2ecf20Sopenharmony_ci}; 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ciFor convenience there are macros defined in imx27-pinfunc.h which provide PIN 918c2ecf20Sopenharmony_ciand MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names 928c2ecf20Sopenharmony_ciare defined in the i.MX27 reference manual. 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ciThe above example using macros: 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ciiomuxc: iomuxc@10015000 { 978c2ecf20Sopenharmony_ci compatible = "fsl,imx27-iomuxc"; 988c2ecf20Sopenharmony_ci reg = <0x10015000 0x600>; 998c2ecf20Sopenharmony_ci #address-cells = <1>; 1008c2ecf20Sopenharmony_ci #size-cells = <1>; 1018c2ecf20Sopenharmony_ci ranges; 1028c2ecf20Sopenharmony_ci 1038c2ecf20Sopenharmony_ci gpio1: gpio@10015000 { 1048c2ecf20Sopenharmony_ci ... 1058c2ecf20Sopenharmony_ci }; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci ... 1088c2ecf20Sopenharmony_ci 1098c2ecf20Sopenharmony_ci uart { 1108c2ecf20Sopenharmony_ci pinctrl_uart1: uart-1 { 1118c2ecf20Sopenharmony_ci fsl,pins = < 1128c2ecf20Sopenharmony_ci MX27_PAD_UART1_TXD__UART1_TXD 0x0 1138c2ecf20Sopenharmony_ci MX27_PAD_UART1_RXD__UART1_RXD 0x0 1148c2ecf20Sopenharmony_ci MX27_PAD_UART1_CTS__UART1_CTS 0x0 1158c2ecf20Sopenharmony_ci MX27_PAD_UART1_RTS__UART1_RTS 0x0 1168c2ecf20Sopenharmony_ci >; 1178c2ecf20Sopenharmony_ci }; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci ... 1208c2ecf20Sopenharmony_ci }; 1218c2ecf20Sopenharmony_ci}; 122