18c2ecf20Sopenharmony_ciBroadcom Northstar plus (NSP) GPIO/PINCONF Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible: 58c2ecf20Sopenharmony_ci Must be "brcm,nsp-gpio-a" 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci- reg: 88c2ecf20Sopenharmony_ci Should contain the register physical address and length for each of 98c2ecf20Sopenharmony_ci GPIO base, IO control registers 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci- #gpio-cells: 128c2ecf20Sopenharmony_ci Must be two. The first cell is the GPIO pin number (within the 138c2ecf20Sopenharmony_ci controller's pin space) and the second cell is used for the following: 148c2ecf20Sopenharmony_ci bit[0]: polarity (0 for active high and 1 for active low) 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci- gpio-controller: 178c2ecf20Sopenharmony_ci Specifies that the node is a GPIO controller 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci- ngpios: 208c2ecf20Sopenharmony_ci Number of gpios supported (58x25 supports 32 and 58x23 supports 24) 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciOptional properties: 238c2ecf20Sopenharmony_ci- interrupts: 248c2ecf20Sopenharmony_ci Interrupt ID 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci- interrupt-controller: 278c2ecf20Sopenharmony_ci Specifies that the node is an interrupt controller 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci- gpio-ranges: 308c2ecf20Sopenharmony_ci Specifies the mapping between gpio controller and pin-controllers pins. 318c2ecf20Sopenharmony_ci This requires 4 fields in cells defined as - 328c2ecf20Sopenharmony_ci 1. Phandle of pin-controller. 338c2ecf20Sopenharmony_ci 2. GPIO base pin offset. 348c2ecf20Sopenharmony_ci 3 Pin-control base pin offset. 358c2ecf20Sopenharmony_ci 4. number of gpio pins which are linearly mapped from pin base. 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ciSupported generic PINCONF properties in child nodes: 388c2ecf20Sopenharmony_ci- pins: 398c2ecf20Sopenharmony_ci The list of pins (within the controller's own pin space) that properties 408c2ecf20Sopenharmony_ci in the node apply to. Pin names are "gpio-<pin>" 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci- bias-disable: 438c2ecf20Sopenharmony_ci Disable pin bias 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci- bias-pull-up: 468c2ecf20Sopenharmony_ci Enable internal pull up resistor 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci- bias-pull-down: 498c2ecf20Sopenharmony_ci Enable internal pull down resistor 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci- drive-strength: 528c2ecf20Sopenharmony_ci Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA) 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ciExample: 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci gpioa: gpio@18000020 { 578c2ecf20Sopenharmony_ci compatible = "brcm,nsp-gpio-a"; 588c2ecf20Sopenharmony_ci reg = <0x18000020 0x100>, 598c2ecf20Sopenharmony_ci <0x1803f1c4 0x1c>; 608c2ecf20Sopenharmony_ci #gpio-cells = <2>; 618c2ecf20Sopenharmony_ci gpio-controller; 628c2ecf20Sopenharmony_ci ngpios = <32>; 638c2ecf20Sopenharmony_ci gpio-ranges = <&pinctrl 0 0 31>; 648c2ecf20Sopenharmony_ci interrupt-controller; 658c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci /* Hog a few default settings */ 688c2ecf20Sopenharmony_ci pinctrl-names = "default"; 698c2ecf20Sopenharmony_ci pinctrl-0 = <&led>; 708c2ecf20Sopenharmony_ci led: led { 718c2ecf20Sopenharmony_ci pins = "gpio-1"; 728c2ecf20Sopenharmony_ci bias-pull-up; 738c2ecf20Sopenharmony_ci }; 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci pwr: pwr { 768c2ecf20Sopenharmony_ci gpio-hog; 778c2ecf20Sopenharmony_ci gpios = <3 1>; 788c2ecf20Sopenharmony_ci output-high; 798c2ecf20Sopenharmony_ci }; 808c2ecf20Sopenharmony_ci }; 81