18c2ecf20Sopenharmony_ciBerlin SATA PHY 28c2ecf20Sopenharmony_ci--------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciRequired properties: 58c2ecf20Sopenharmony_ci- compatible: should be one of 68c2ecf20Sopenharmony_ci "marvell,berlin2-sata-phy" 78c2ecf20Sopenharmony_ci "marvell,berlin2q-sata-phy" 88c2ecf20Sopenharmony_ci- address-cells: should be 1 98c2ecf20Sopenharmony_ci- size-cells: should be 0 108c2ecf20Sopenharmony_ci- phy-cells: from the generic PHY bindings, must be 1 118c2ecf20Sopenharmony_ci- reg: address and length of the register 128c2ecf20Sopenharmony_ci- clocks: reference to the clock entry 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciSub-nodes: 158c2ecf20Sopenharmony_ciEach PHY should be represented as a sub-node. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciSub-nodes required properties: 188c2ecf20Sopenharmony_ci- reg: the PHY number 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciExample: 218c2ecf20Sopenharmony_ci sata_phy: phy@f7e900a0 { 228c2ecf20Sopenharmony_ci compatible = "marvell,berlin2q-sata-phy"; 238c2ecf20Sopenharmony_ci reg = <0xf7e900a0 0x200>; 248c2ecf20Sopenharmony_ci clocks = <&chip CLKID_SATA>; 258c2ecf20Sopenharmony_ci #address-cells = <1>; 268c2ecf20Sopenharmony_ci #size-cells = <0>; 278c2ecf20Sopenharmony_ci #phy-cells = <1>; 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci sata-phy@0 { 308c2ecf20Sopenharmony_ci reg = <0>; 318c2ecf20Sopenharmony_ci }; 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci sata-phy@1 { 348c2ecf20Sopenharmony_ci reg = <1>; 358c2ecf20Sopenharmony_ci }; 368c2ecf20Sopenharmony_ci }; 37