18c2ecf20Sopenharmony_ciFaraday Technology FTPCI100 PCI Host Bridge
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThis PCI bridge is found inside that Cortina Systems Gemini SoC platform and
48c2ecf20Sopenharmony_ciis a generic IP block from Faraday Technology. It exists in two variants:
58c2ecf20Sopenharmony_ciplain and dual PCI. The plain version embeds a cascading interrupt controller
68c2ecf20Sopenharmony_ciinto the host bridge. The dual version routes the interrupts to the host
78c2ecf20Sopenharmony_cichips interrupt controller.
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ciThe host controller appear on the PCI bus with vendor ID 0x159b (Faraday
108c2ecf20Sopenharmony_ciTechnology) and product ID 0x4321.
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ciMandatory properties:
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci- compatible: ranging from specific to generic, should be one of
158c2ecf20Sopenharmony_ci  "cortina,gemini-pci", "faraday,ftpci100"
168c2ecf20Sopenharmony_ci  "cortina,gemini-pci-dual", "faraday,ftpci100-dual"
178c2ecf20Sopenharmony_ci  "faraday,ftpci100"
188c2ecf20Sopenharmony_ci  "faraday,ftpci100-dual"
198c2ecf20Sopenharmony_ci- reg: memory base and size for the host bridge
208c2ecf20Sopenharmony_ci- #address-cells: set to <3>
218c2ecf20Sopenharmony_ci- #size-cells: set to <2>
228c2ecf20Sopenharmony_ci- #interrupt-cells: set to <1>
238c2ecf20Sopenharmony_ci- bus-range: set to <0x00 0xff>
248c2ecf20Sopenharmony_ci- device_type, set to "pci"
258c2ecf20Sopenharmony_ci- ranges: see pci.txt
268c2ecf20Sopenharmony_ci- interrupt-map-mask: see pci.txt
278c2ecf20Sopenharmony_ci- interrupt-map: see pci.txt
288c2ecf20Sopenharmony_ci- dma-ranges: three ranges for the inbound memory region. The ranges must
298c2ecf20Sopenharmony_ci  be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB,
308c2ecf20Sopenharmony_ci  128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked as
318c2ecf20Sopenharmony_ci  pre-fetchable.
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ciOptional properties:
348c2ecf20Sopenharmony_ci- clocks: when present, this should contain the peripheral clock (PCLK) and the
358c2ecf20Sopenharmony_ci  PCI clock (PCICLK). If these are not present, they are assumed to be
368c2ecf20Sopenharmony_ci  hard-wired enabled and always on. The PCI clock will be 33 or 66 MHz.
378c2ecf20Sopenharmony_ci- clock-names: when present, this should contain "PCLK" for the peripheral
388c2ecf20Sopenharmony_ci  clock and "PCICLK" for the PCI-side clock.
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ciMandatory subnodes:
418c2ecf20Sopenharmony_ci- For "faraday,ftpci100" a node representing the interrupt-controller inside the
428c2ecf20Sopenharmony_ci  host bridge is mandatory. It has the following mandatory properties:
438c2ecf20Sopenharmony_ci  - interrupt: see interrupt-controller/interrupts.txt
448c2ecf20Sopenharmony_ci  - interrupt-controller: see interrupt-controller/interrupts.txt
458c2ecf20Sopenharmony_ci  - #address-cells: set to <0>
468c2ecf20Sopenharmony_ci  - #interrupt-cells: set to <1>
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ciI/O space considerations:
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ciThe plain variant has 128MiB of non-prefetchable memory space, whereas the
518c2ecf20Sopenharmony_ci"dual" variant has 64MiB. Take this into account when describing the ranges.
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ciInterrupt map considerations:
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ciThe "dual" variant will get INT A, B, C, D from the system interrupt controller
568c2ecf20Sopenharmony_ciand should point to respective interrupt in that controller in its
578c2ecf20Sopenharmony_ciinterrupt-map.
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ciThe code which is the only documentation of how the Faraday PCI (the non-dual
608c2ecf20Sopenharmony_civariant) interrupts assigns the default interrupt mapping/swizzling has
618c2ecf20Sopenharmony_citypically been like this, doing the swizzling on the interrupt controller side
628c2ecf20Sopenharmony_cirather than in the interconnect:
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ciinterrupt-map-mask = <0xf800 0 0 7>;
658c2ecf20Sopenharmony_ciinterrupt-map =
668c2ecf20Sopenharmony_ci	<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
678c2ecf20Sopenharmony_ci	<0x4800 0 0 2 &pci_intc 1>,
688c2ecf20Sopenharmony_ci	<0x4800 0 0 3 &pci_intc 2>,
698c2ecf20Sopenharmony_ci	<0x4800 0 0 4 &pci_intc 3>,
708c2ecf20Sopenharmony_ci	<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
718c2ecf20Sopenharmony_ci	<0x5000 0 0 2 &pci_intc 2>,
728c2ecf20Sopenharmony_ci	<0x5000 0 0 3 &pci_intc 3>,
738c2ecf20Sopenharmony_ci	<0x5000 0 0 4 &pci_intc 0>,
748c2ecf20Sopenharmony_ci	<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
758c2ecf20Sopenharmony_ci	<0x5800 0 0 2 &pci_intc 3>,
768c2ecf20Sopenharmony_ci	<0x5800 0 0 3 &pci_intc 0>,
778c2ecf20Sopenharmony_ci	<0x5800 0 0 4 &pci_intc 1>,
788c2ecf20Sopenharmony_ci	<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
798c2ecf20Sopenharmony_ci	<0x6000 0 0 2 &pci_intc 0>,
808c2ecf20Sopenharmony_ci	<0x6000 0 0 3 &pci_intc 1>,
818c2ecf20Sopenharmony_ci	<0x6000 0 0 4 &pci_intc 2>;
828c2ecf20Sopenharmony_ci
838c2ecf20Sopenharmony_ciExample:
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_cipci@50000000 {
868c2ecf20Sopenharmony_ci	compatible = "cortina,gemini-pci", "faraday,ftpci100";
878c2ecf20Sopenharmony_ci	reg = <0x50000000 0x100>;
888c2ecf20Sopenharmony_ci	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, /* PCI A */
898c2ecf20Sopenharmony_ci			<26 IRQ_TYPE_LEVEL_HIGH>, /* PCI B */
908c2ecf20Sopenharmony_ci			<27 IRQ_TYPE_LEVEL_HIGH>, /* PCI C */
918c2ecf20Sopenharmony_ci			<28 IRQ_TYPE_LEVEL_HIGH>; /* PCI D */
928c2ecf20Sopenharmony_ci	#address-cells = <3>;
938c2ecf20Sopenharmony_ci	#size-cells = <2>;
948c2ecf20Sopenharmony_ci	#interrupt-cells = <1>;
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci	bus-range = <0x00 0xff>;
978c2ecf20Sopenharmony_ci	ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
988c2ecf20Sopenharmony_ci		 <0x01000000 0 0          0x50000000 0 0x00100000>,
998c2ecf20Sopenharmony_ci		 /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
1008c2ecf20Sopenharmony_ci		 <0x02000000 0 0x58000000 0x58000000 0 0x08000000>;
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	/* DMA ranges */
1038c2ecf20Sopenharmony_ci	dma-ranges =
1048c2ecf20Sopenharmony_ci	/* 128MiB at 0x00000000-0x07ffffff */
1058c2ecf20Sopenharmony_ci	<0x02000000 0 0x00000000 0x00000000 0 0x08000000>,
1068c2ecf20Sopenharmony_ci	/* 64MiB at 0x00000000-0x03ffffff */
1078c2ecf20Sopenharmony_ci	<0x02000000 0 0x00000000 0x00000000 0 0x04000000>,
1088c2ecf20Sopenharmony_ci	/* 64MiB at 0x00000000-0x03ffffff */
1098c2ecf20Sopenharmony_ci	<0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci	interrupt-map-mask = <0xf800 0 0 7>;
1128c2ecf20Sopenharmony_ci	interrupt-map =
1138c2ecf20Sopenharmony_ci		<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
1148c2ecf20Sopenharmony_ci		<0x4800 0 0 2 &pci_intc 1>,
1158c2ecf20Sopenharmony_ci		<0x4800 0 0 3 &pci_intc 2>,
1168c2ecf20Sopenharmony_ci		<0x4800 0 0 4 &pci_intc 3>,
1178c2ecf20Sopenharmony_ci		<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
1188c2ecf20Sopenharmony_ci		<0x5000 0 0 2 &pci_intc 2>,
1198c2ecf20Sopenharmony_ci		<0x5000 0 0 3 &pci_intc 3>,
1208c2ecf20Sopenharmony_ci		<0x5000 0 0 4 &pci_intc 0>,
1218c2ecf20Sopenharmony_ci		<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
1228c2ecf20Sopenharmony_ci		<0x5800 0 0 2 &pci_intc 3>,
1238c2ecf20Sopenharmony_ci		<0x5800 0 0 3 &pci_intc 0>,
1248c2ecf20Sopenharmony_ci		<0x5800 0 0 4 &pci_intc 1>,
1258c2ecf20Sopenharmony_ci		<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
1268c2ecf20Sopenharmony_ci		<0x6000 0 0 2 &pci_intc 0>,
1278c2ecf20Sopenharmony_ci		<0x6000 0 0 3 &pci_intc 0>,
1288c2ecf20Sopenharmony_ci		<0x6000 0 0 4 &pci_intc 0>;
1298c2ecf20Sopenharmony_ci	pci_intc: interrupt-controller {
1308c2ecf20Sopenharmony_ci		interrupt-parent = <&intcon>;
1318c2ecf20Sopenharmony_ci		interrupt-controller;
1328c2ecf20Sopenharmony_ci		#address-cells = <0>;
1338c2ecf20Sopenharmony_ci		#interrupt-cells = <1>;
1348c2ecf20Sopenharmony_ci	};
1358c2ecf20Sopenharmony_ci};
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