18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/nvmem/qcom,spmi-sdam.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Qualcomm Technologies, Inc. SPMI SDAM DT bindings 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Shyam Kumar Thella <sthella@codeaurora.org> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_cidescription: | 138c2ecf20Sopenharmony_ci The SDAM provides scratch register space for the PMIC clients. This 148c2ecf20Sopenharmony_ci memory can be used by software to store information or communicate 158c2ecf20Sopenharmony_ci to/from the PBUS. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciallOf: 188c2ecf20Sopenharmony_ci - $ref: "nvmem.yaml#" 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciproperties: 218c2ecf20Sopenharmony_ci compatible: 228c2ecf20Sopenharmony_ci enum: 238c2ecf20Sopenharmony_ci - qcom,spmi-sdam 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci reg: 268c2ecf20Sopenharmony_ci maxItems: 1 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci "#address-cells": 298c2ecf20Sopenharmony_ci const: 1 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci "#size-cells": 328c2ecf20Sopenharmony_ci const: 1 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci ranges: true 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_cirequired: 378c2ecf20Sopenharmony_ci - compatible 388c2ecf20Sopenharmony_ci - reg 398c2ecf20Sopenharmony_ci - ranges 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_cipatternProperties: 428c2ecf20Sopenharmony_ci "^.*@[0-9a-f]+$": 438c2ecf20Sopenharmony_ci type: object 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci properties: 468c2ecf20Sopenharmony_ci reg: 478c2ecf20Sopenharmony_ci maxItems: 1 488c2ecf20Sopenharmony_ci description: 498c2ecf20Sopenharmony_ci Offset and size in bytes within the storage device. 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci bits: 528c2ecf20Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32-array 538c2ecf20Sopenharmony_ci maxItems: 1 548c2ecf20Sopenharmony_ci items: 558c2ecf20Sopenharmony_ci items: 568c2ecf20Sopenharmony_ci - minimum: 0 578c2ecf20Sopenharmony_ci maximum: 7 588c2ecf20Sopenharmony_ci description: 598c2ecf20Sopenharmony_ci Offset in bit within the address range specified by reg. 608c2ecf20Sopenharmony_ci - minimum: 1 618c2ecf20Sopenharmony_ci description: 628c2ecf20Sopenharmony_ci Size in bit within the address range specified by reg. 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci required: 658c2ecf20Sopenharmony_ci - reg 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci additionalProperties: false 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ciunevaluatedProperties: false 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ciexamples: 728c2ecf20Sopenharmony_ci - | 738c2ecf20Sopenharmony_ci sdam_1: nvram@b000 { 748c2ecf20Sopenharmony_ci #address-cells = <1>; 758c2ecf20Sopenharmony_ci #size-cells = <1>; 768c2ecf20Sopenharmony_ci compatible = "qcom,spmi-sdam"; 778c2ecf20Sopenharmony_ci reg = <0xb000 0x100>; 788c2ecf20Sopenharmony_ci ranges = <0 0xb000 0x100>; 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ci /* Data cells */ 818c2ecf20Sopenharmony_ci restart_reason: restart@50 { 828c2ecf20Sopenharmony_ci reg = <0x50 0x1>; 838c2ecf20Sopenharmony_ci bits = <6 2>; 848c2ecf20Sopenharmony_ci }; 858c2ecf20Sopenharmony_ci }; 868c2ecf20Sopenharmony_ci... 87