18c2ecf20Sopenharmony_ci* CA8210 IEEE 802.15.4 * 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci - compatible: Should be "cascoda,ca8210" 58c2ecf20Sopenharmony_ci - reg: Controlling chip select 68c2ecf20Sopenharmony_ci - spi-max-frequency: Maximum clock speed, should be *less than* 78c2ecf20Sopenharmony_ci 4000000 88c2ecf20Sopenharmony_ci - spi-cpol: Requires inverted clock polarity 98c2ecf20Sopenharmony_ci - reset-gpio: GPIO attached to reset 108c2ecf20Sopenharmony_ci - irq-gpio: GPIO attached to IRQ 118c2ecf20Sopenharmony_ciOptional properties: 128c2ecf20Sopenharmony_ci - extclock-enable: Include for the ca8210 to route its 16MHz clock 138c2ecf20Sopenharmony_ci to an output 148c2ecf20Sopenharmony_ci - extclock-freq: Frequency in Hz of the external clock 158c2ecf20Sopenharmony_ci - extclock-gpio: GPIO of the ca8210 to output the clock on 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciExample: 188c2ecf20Sopenharmony_ci ca8210@0 { 198c2ecf20Sopenharmony_ci compatible = "cascoda,ca8210"; 208c2ecf20Sopenharmony_ci reg = <0>; 218c2ecf20Sopenharmony_ci spi-max-frequency = <3000000>; 228c2ecf20Sopenharmony_ci spi-cpol; 238c2ecf20Sopenharmony_ci reset-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>; 248c2ecf20Sopenharmony_ci irq-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; 258c2ecf20Sopenharmony_ci extclock-enable; 268c2ecf20Sopenharmony_ci extclock-freq = 16000000; 278c2ecf20Sopenharmony_ci extclock-gpio = 2; 288c2ecf20Sopenharmony_ci }; 29